mirror
/
SP8EBC-ParaTNC
kopia lustrzana https://github.com/SP8EBC/ParaTNC
1
0
Forkuj 0
Kod Zgłoszenia Projekty Wydania Wiki Aktywność

spi expiremnts almost working

tatry_variant
Mateusz Lubecki 2022-10-02 10:39:04 +02:00
rodzic 7f5368ae08
commit fd9ed99190
3 zmienionych plików z 18 dodań i 14 usunięć
Pokaż statystyki Ściągnij plik aktualizacji Ściągnij plik porównania Expand all files Collapse all files

1
.cproject
Wyświetl plik

@ -494,7 +494,6 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="api" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="include"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="include/api"/>
<entry excluding="Timer.cpp" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="src"/>
<entry excluding="src/newlib|src/drivers/f1|src/cmsis/vectors_stm32f10x.c|src/cmsis/system_stm32f10x.c|src/cortexm|src/stm32f1-stdperiph|src/stm32f1-stdperiph/stm32f10x_adc.c|src/stm32f1-stdperiph/stm32f10x_wwdg.c|src/drivers/tm_stm32fonewire/tm_stm32f1_onewire.c|src/stm32f1-stdperiph/stm32f10x_bkp.c|src/stm32f1-stdperiph/stm32f10x_dac.c|src/stm32f1-stdperiph/stm32f10x_can.c|src/stm32f1-stdperiph/stm32f10x_spi.c|src/stm32f1-stdperiph/stm32f10x_pwr.c|src/stm32f1-stdperiph/stm32f10x_sdio.c|src/stm32f1-stdperiph/stm32f10x_fsmc.c|src/stm32f1-stdperiph/stm32f10x_cec.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="system"/>

2
system/src/drivers/dallas.c
Wyświetl plik

@ -105,7 +105,6 @@ void dallas_config_timer(void) {
//NVIC_DisableIRQ( TIM3_IRQn ); // data transmission initializer
NVIC_DisableIRQ( TIM4_IRQn ); // data transmission initializer
NVIC_DisableIRQ( TIM7_IRQn ); // data transmission initializer
//NVIC_DisableIRQ( 25 ); // TODO: probably remainder of TX20 driver to be deleted
dallas_delay_start();
@ -119,7 +118,6 @@ void dallas_deconfig_timer(void) {
//NVIC_EnableIRQ( TIM3_IRQn ); // adc
NVIC_EnableIRQ( TIM4_IRQn ); // data transmission initializer
NVIC_EnableIRQ( TIM7_IRQn ); // data transmission initializer
//NVIC_EnableIRQ( 25 ); // TODO: probably remainder of TX20 driver to be deleted
dallas_delay_stop();
//timm = 0;

29
system/src/drivers/l4/spi_stm32l4xx.c
Wyświetl plik

@ -17,6 +17,7 @@
#include <string.h>
#define SPI_CS_TO_SCLK_SETUP_DELAY 0x2FF
#define SPI_BUFFER_LN 32
/**
@ -274,16 +275,18 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st
*
*
//#define SPI_CR1_CPHA_Pos (0U)
//#define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
//#define SPI_CR1_CPHA SPI_CR1_CPHA_Msk /*!<Clock Phase */
//#define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) //!< 0x00000001
//#define SPI_CR1_CPHA SPI_CR1_CPHA_Msk //!<Clock Phase
//#define SPI_CR1_CPOL_Pos (1U)
//#define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
//#define SPI_CR1_CPOL SPI_CR1_CPOL_Msk /*!<Clock Polarity */
//#define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) //!< 0x00000002
//#define SPI_CR1_CPOL SPI_CR1_CPOL_Msk //!<Clock Polarity
uint8_t spi_rx_data(uint32_t slave_id, uint8_t * rx_buffer, uint16_t ln_to_rx) {
return 0xFF;
}
*/
/**
* Initiate tx only transaction. Data will be sent to chosen slave, any receive data will be discarded
*/
@ -311,8 +314,6 @@ uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx) {
spi_current_slave = slave_id;
LL_GPIO_ResetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
// if yes clear counter
spi_current_tx_cntr = 0;
@ -345,7 +346,7 @@ uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx) {
spi_tx_bytes_rq = ln_to_tx;
}
spi_enable(0);
spi_enable(1);
}
}
else {
@ -373,8 +374,6 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff
spi_current_slave = slave_id;
LL_GPIO_ResetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
spi_current_rx_cntr = 0;
spi_current_tx_cntr = 0;
@ -443,7 +442,7 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff
spi_tx_state = SPI_TX_TXING;
// start trasmission
spi_enable(0);
spi_enable(1);
}
else {
// exit if either transmission or reception is ongoing
@ -550,7 +549,10 @@ void spi_irq_handler(void) {
SPI2->DR = spi_tx_buffer[spi_current_tx_cntr++];
}
else {
while((SPI2->SR & SPI_SR_BSY) != 0); // blocking!!
while((SPI2->SR & SPI_SR_BSY) != 0) { // blocking!!
// clear RX fifo while rest of bytes are transmitted
spi_garbage = SPI2->DR & 0xFF;
}
// finish transmission
spi_tx_state = SPI_TX_DONE;
@ -650,6 +652,9 @@ void spi_timeout_handler(void) {
void spi_enable(uint8_t cs_assert) {
// delay between asserting chip select and starting SPI
volatile int delay = 0;
SPI2->CR2 |= SPI_CR2_ERRIE;
SPI2->CR2 |= SPI_CR2_RXNEIE;
SPI2->CR2 |= SPI_CR2_TXEIE;
@ -657,6 +662,8 @@ void spi_enable(uint8_t cs_assert) {
if (cs_assert != 0) {
LL_GPIO_ResetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
// delay required by CS to SCLK Setup (MAX31865)
for (delay = 0; delay < SPI_CS_TO_SCLK_SETUP_DELAY; delay++);
}
LL_SPI_Enable(SPI2);