kopia lustrzana https://github.com/SP8EBC/ParaTNC
max31865 pooling - not finished, some tweaks and comments for spi driver
Mateusz Lubecki
rodzic
37c76aeb1d
commit
f094422d92
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@ -152,8 +152,6 @@ void SysTick_Handler(void) {
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i2cKeepTimeout();
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spi_timeout_handler();
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delay_decrement_counter();
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if (it_handlers_inhibit_radiomodem_dcd_led == 0) {
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@ -1430,6 +1430,8 @@ int main(int argc, char* argv[]){
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wx_check_force_i2c_reset();
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max31865_pool();
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#ifdef INTERNAL_WATCHDOG
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IWDG_ReloadCounter();
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#endif
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@ -20,7 +20,7 @@ typedef enum max31865_qf_t {
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}max31865_qf_t;
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void max31865_init(uint8_t rdt_type);
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void max31865_start_measurement(void);
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void max31865_pool(void);
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int32_t max31865_get_result(max31865_qf_t * quality_factor);
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@ -1,5 +1,9 @@
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/*
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* spi_stm32l4x.h
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* spi.h
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*
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* This is a general interface of SPI driver. Please read notes
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* in platform specific implementation. Each of them might have
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* it's own limitations
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*
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* Created on: Sep 22, 2022
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* Author: mateusz
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@ -10,13 +14,19 @@
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#include <stdint.h>
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#define SPI_OK 0
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#define SPI_BUSY_DIFF_SLAVE 10
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#define SPI_BUSY 11
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#define SPI_TX_DATA_TO_LONG 20
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#define SPI_WRONG_SLAVE_ID 30
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#define SPI_UKNOWN 255
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/**
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* Return codes
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*/
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#define SPI_OK 0 //!< Function has succeeded
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#define SPI_BUSY_DIFF_SLAVE 10 //!< Communication has been requested for different slave than what transmission is ongoing for
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#define SPI_BUSY 11 //!< SPI bus is currently busy and cannot be used for requested operation
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#define SPI_TX_DATA_TO_LONG 20 //!< requested data is too long to fit in internal SPI tx buffer
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#define SPI_WRONG_SLAVE_ID 30 //!< unknown SPI slave (missing chip select mapping)
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#define SPI_UKNOWN 255 //!< undesignated SPI error
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/**
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* SPI transfer mode using for initialization
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*/
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typedef enum spi_transfer_mode_t {
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SPI_MASTER_MOTOROLA,
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SPI_MASTER_TI,
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@ -24,26 +34,39 @@ typedef enum spi_transfer_mode_t {
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SPI_SLAVE_TI
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}spi_transfer_mode_t;
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/**
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* SPI clock mode using for initialization, look at CPOL and CPHA values for each enum values.
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*/
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typedef enum spi_clock_polarity_strobe_t {
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CLOCK_NORMAL_FALLING, // CPOL 0, CPHA 1
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CLOCK_NORMAL_RISING, // CPOL 0, CPHA 0
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CLOCK_REVERSED_FALLING, // CPOL 1, CPHA 0
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CLOCK_REVERSED_RISING // CPOL 1, CPHA 1
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CLOCK_NORMAL_FALLING, //!< CPOL 0, CPHA 1
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CLOCK_NORMAL_RISING, //!< CPOL 0, CPHA 0
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CLOCK_REVERSED_FALLING, //!< CPOL 1, CPHA 0
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CLOCK_REVERSED_RISING //!< CPOL 1, CPHA 1
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}spi_clock_polarity_strobe_t;
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#define SPI_ENDIAN_LSB 0
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#define SPI_ENDIAN_MSB 1
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#define SPI_TX_FROM_INTERNAL 1
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#define SPI_TX_FROM_EXTERNAL 2
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#define SPI_USE_INTERNAL_RX_BUF 0
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/**
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* Current SPI reception state
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*/
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typedef enum spi_rx_state_t {
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SPI_RX_IDLE, // SPI is configured and ready for operation
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SPI_RX_RXING, // SPI is currently receiving
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SPI_RX_DONE, // Reception is done
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SPI_RX_WAITING_FOR_RX, // SPI is currently transmitting and reception is queued
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SPI_RX_ERROR_OVERRUN, // Overrun had been detected and reception was terminated
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SPI_RX_IDLE, //!< SPI is configured and ready for operation
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SPI_RX_RXING, //!< SPI is currently receiving
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SPI_RX_DONE, //!< Reception is done
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SPI_RX_WAITING_FOR_RX, //!< SPI is currently transmitting and reception is queued
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SPI_RX_ERROR_OVERRUN, //!< Overrun had been detected and reception was terminated
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SPI_RX_ERROR_MODF,
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SPI_RX_ERROR_TIMEOUT // Timeout has been detected
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}spi_rx_state_t;
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/**
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* Current SPI transmission state
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*/
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typedef enum spi_tx_state_t {
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SPI_TX_IDLE,
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SPI_TX_TXING,
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@ -51,21 +74,30 @@ typedef enum spi_tx_state_t {
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SPI_TX_ERROR_MODF
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}spi_tx_state_t;
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#define SPI_TIMEOUT_MSEC 100
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//! This function initializes SPI bus to work as full duplex two-wire connection, w/o DMA data flow
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uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_strobe_t strobe, int speed, int endianess);
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uint8_t spi_rx_data(uint32_t slave_id, uint8_t * rx_buffer, uint16_t ln_to_rx);
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uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx);
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uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buffer, uint16_t ln_to_rx, uint16_t ln_to_tx);
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//! Sends data asynchronously to selected SPI slave, discards anything what will come in over MISO line
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uint8_t spi_tx_data(uint32_t slave_id, uint8_t tx_from_internal, uint8_t * tx_buffer, uint16_t ln_to_tx);
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//! Sends data synchronously to selected slave and after that receives data from it. Everything received before TX is finish is discarded.
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uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t tx_from_internal, uint8_t * rx_buffer, uint8_t * tx_buffer, uint16_t ln_to_rx, uint16_t ln_to_tx);
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//! Returns pointer to receive buffer and if reception is done resets RX state back to idle.
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uint8_t * spi_get_rx_data(void);
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//! Blocking wait until both RX and TX is done
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uint8_t spi_wait_for_comms_done(void);
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//! Resets all errors and reverts state back to IDLE
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void spi_reset_errors(void);
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void spi_irq_handler(void);
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void spi_timeout_handler(void);
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spi_rx_state_t spi_get_rx_state(void);
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spi_tx_state_t spi_get_tx_state(void);
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void spi_enable(uint8_t cs_assert);
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void spi_disable(uint8_t immediately);
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//! Returns an ID of current SPI slave or zero if SPI is idle
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uint32_t spi_get_current_slave(void);
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void spi_irq_handler(void);
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#endif /* INCLUDE_DRIVERS_SPI_H_ */
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@ -1,6 +1,9 @@
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/*
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* spi_stm32l4xx.c
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*
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* This module consist an implementation of SPI driver for STM32L4xx micro, but with some
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* limitations over what this micro actually supports.
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*
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* Created on: Sep 22, 2022
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* Author: mateusz
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*/
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@ -81,11 +84,6 @@ uint8_t * spi_tx_buffer_ptr;
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*/
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uint8_t spi_garbage;
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/**
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* Timestamp when receiving has been initiated
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*/
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uint32_t spi_timestamp_rx_start;
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/**
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* How many bytes has been discarded into garbage storage
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*/
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@ -93,6 +91,65 @@ uint8_t spi_garbage_counter = 0;
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EVAL_SLAVE_ARR
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static void spi_enable(uint8_t cs_assert) {
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// delay between asserting chip select and starting SPI
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volatile int delay = 0;
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SPI2->CR2 |= SPI_CR2_ERRIE;
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SPI2->CR2 |= SPI_CR2_RXNEIE;
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SPI2->CR2 |= SPI_CR2_TXEIE;
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if (cs_assert != 0) {
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LL_GPIO_ResetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
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// delay required by CS to SCLK Setup (MAX31865)
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for (delay = 0; delay < SPI_CS_TO_SCLK_SETUP_DELAY; delay++);
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}
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LL_SPI_Enable(SPI2);
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}
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/**
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* This function will disable SPI and close bus communication, optionally
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* it can wait until the peripheral will be released
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*/
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static void spi_disable(uint8_t immediately) {
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if (immediately == 0) {
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while ((SPI2->SR & SPI_SR_BSY) != 0);
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LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
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LL_SPI_Disable(SPI2);
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// disable all interrupts
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE);
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if ((SPI2->SR & SPI_SR_RXNE) != 0) {
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// clear RX fifo queue
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do {
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spi_garbage_counter++;
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spi_garbage = SPI2->DR & 0xFF;
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} while ((SPI2->SR & SPI_SR_RXNE) != 0);
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}
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}
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else {
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LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
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// disable all interrupts
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE);
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LL_SPI_Disable(SPI2);
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}
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}
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uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_strobe_t strobe, int speed, int endianess) {
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LL_GPIO_InitTypeDef GPIO_InitTypeDef;
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@ -290,7 +347,7 @@ uint8_t spi_rx_data(uint32_t slave_id, uint8_t * rx_buffer, uint16_t ln_to_rx) {
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/**
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* Initiate tx only transaction. Data will be sent to chosen slave, any receive data will be discarded
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*/
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uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx) {
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uint8_t spi_tx_data(uint32_t slave_id, uint8_t tx_from_internal, uint8_t * tx_buffer, uint16_t ln_to_tx) {
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uint8_t out = SPI_UKNOWN;
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@ -318,7 +375,7 @@ uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx) {
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spi_current_tx_cntr = 0;
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// check if external or internal buffer shall be used
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if (tx_buffer == 0) {
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if (tx_from_internal == SPI_TX_FROM_INTERNAL) {
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spi_tx_buffer_ptr = spi_tx_buffer;
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// check if internal buffer has enought room for data
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@ -358,10 +415,11 @@ uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx) {
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/**
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* Initiate full duplex communication with the slave. After this call the SPI bus
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* will be enabled and all data from tx_buffer will be send. SPI bus will be disabled
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* after requested amount of data will be received or timeout occured.
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* will be enabled and all data from tx_buffer will be send. After transmitting all bytes
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* the master will transmit 0xFF on MOSI in the loop, until requested number of bytes
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* will be received. Then SPI is disabled
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*/
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uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buffer, uint16_t ln_to_rx, uint16_t ln_to_tx) {
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uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t tx_from_internal, uint8_t * rx_buffer, uint8_t * tx_buffer, uint16_t ln_to_rx, uint16_t ln_to_tx) {
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uint8_t out = SPI_UKNOWN;
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@ -404,7 +462,7 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff
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}
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// check if external TX buffer shall be user or not
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if (tx_buffer == 0) {
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if (tx_from_internal == SPI_TX_FROM_INTERNAL) {
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spi_tx_buffer_ptr = spi_tx_buffer;
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// check if internal buffer has enought room for data
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@ -432,9 +490,6 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff
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spi_tx_bytes_rq = ln_to_tx;
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}
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// latch a timestamp when reception has been triggered
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spi_timestamp_rx_start = master_time;
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// // set first byte for transmission
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// SPI2->DR = spi_tx_buffer_ptr[0];
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@ -485,11 +540,28 @@ uint8_t spi_wait_for_comms_done(void) {
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}
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void spi_reset_errors(void) {
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if (spi_rx_state == SPI_RX_ERROR_MODF || spi_rx_state == SPI_RX_ERROR_OVERRUN || spi_rx_state == SPI_RX_ERROR_TIMEOUT) {
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if (spi_rx_state == SPI_RX_ERROR_MODF || spi_rx_state == SPI_RX_ERROR_OVERRUN) {
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spi_rx_state = SPI_RX_IDLE;
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}
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}
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spi_rx_state_t spi_get_rx_state(void) {
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return spi_rx_state;
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}
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spi_tx_state_t spi_get_tx_state(void) {
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return spi_tx_state;
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}
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uint32_t spi_get_current_slave(void) {
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if (spi_rx_state != SPI_RX_RXING && spi_tx_state != SPI_TX_TXING) {
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return 0;
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}
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else {
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return spi_current_slave;
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}
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}
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void spi_irq_handler(void) {
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// The RXNE flag is set depending on the FRXTH bit value in the SPIx_CR2 register:
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@ -636,77 +708,3 @@ void spi_irq_handler(void) {
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spi_disable(1);
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}
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}
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/**
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* This function should be caller from SysTick Interrupt
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*/
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void spi_timeout_handler(void) {
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if (spi_rx_state == SPI_RX_RXING) {
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if (master_time - spi_timestamp_rx_start > SPI_RX_ERROR_TIMEOUT) {
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spi_rx_state = SPI_RX_ERROR_TIMEOUT;
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spi_tx_state = SPI_TX_IDLE;
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spi_disable(1);
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}
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}
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}
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void spi_enable(uint8_t cs_assert) {
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// delay between asserting chip select and starting SPI
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volatile int delay = 0;
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SPI2->CR2 |= SPI_CR2_ERRIE;
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SPI2->CR2 |= SPI_CR2_RXNEIE;
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SPI2->CR2 |= SPI_CR2_TXEIE;
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if (cs_assert != 0) {
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LL_GPIO_ResetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
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// delay required by CS to SCLK Setup (MAX31865)
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for (delay = 0; delay < SPI_CS_TO_SCLK_SETUP_DELAY; delay++);
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}
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LL_SPI_Enable(SPI2);
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}
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/**
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* This function will disable SPI and close bus communication, optionally
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* it can wait until the peripheral will be released
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*/
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void spi_disable(uint8_t immediately) {
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if (immediately == 0) {
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while ((SPI2->SR & SPI_SR_BSY) != 0);
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LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
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LL_SPI_Disable(SPI2);
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// disable all interrupts
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE);
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if ((SPI2->SR & SPI_SR_RXNE) != 0) {
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// clear RX fifo queue
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do {
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spi_garbage_counter++;
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spi_garbage = SPI2->DR & 0xFF;
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} while ((SPI2->SR & SPI_SR_RXNE) != 0);
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}
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}
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else {
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LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
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// disable all interrupts
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE);
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SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE);
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LL_SPI_Disable(SPI2);
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}
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}
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@ -7,6 +7,26 @@
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#include "drivers/max31865.h"
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typedef enum max31865_pool_state_t {
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MAX_IDLE,
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MAX_INITIALIZED,
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MAX_ERROR,
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MAX_MEASUREMENT_STARTED,
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MAX_REGISTER_REQUESTED,
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MAX_SHUTDOWN,
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MAX_POWER_OFF
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}max31865_pool_state_t;
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||||
|
||||
max31865_pool_state_t max31865_current_state = MAX_IDLE;
|
||||
|
||||
/**
|
||||
* This variable is incremented from 0 up to 9 to pause measurement
|
||||
* state machine into MAX_SHUTDOWN state. When it reach 9 measurement
|
||||
* is triggered
|
||||
*/
|
||||
uint8_t max31865_shutdown_ticks = 0;
|
||||
|
||||
/**
|
||||
* 1 - bias on
|
||||
* 0 - bias on
|
||||
|
|
@ -48,6 +68,9 @@ uint8_t max31865_filter_select = 0;
|
|||
|
||||
uint8_t max31865_buffer[3] = {0u};
|
||||
|
||||
/**
|
||||
* Set to one if MAX has been initialized correctly
|
||||
*/
|
||||
uint8_t max31865_ok = 0;
|
||||
|
||||
/**
|
||||
|
|
@ -68,8 +91,44 @@ static uint8_t max31865_get_config_register(void) {
|
|||
return out;
|
||||
}
|
||||
|
||||
static void max31865_request_registers(void) {
|
||||
|
||||
uint8_t result = 0;
|
||||
|
||||
// check if SPI is busy now
|
||||
if (spi_get_current_slave() == 0) {
|
||||
// read adres of configuation register
|
||||
max31865_buffer[0] = 0x00;
|
||||
max31865_buffer[1] = 0x00;
|
||||
|
||||
// read data for verifiaction
|
||||
result = spi_rx_tx_data(1, SPI_TX_FROM_EXTERNAL, SPI_USE_INTERNAL_RX_BUF, max31865_buffer, 10, 1);
|
||||
}
|
||||
else {
|
||||
max31865_current_state = MAX_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
static void max31865_send_config_measurement(void) {
|
||||
uint8_t result = 0;
|
||||
|
||||
// check if SPI is busy now
|
||||
if (spi_get_current_slave() == 0) {
|
||||
// read adres of configuation register
|
||||
max31865_buffer[0] = 0x80;
|
||||
max31865_buffer[1] = max31865_get_config_register();
|
||||
|
||||
spi_tx_data(1, SPI_TX_FROM_EXTERNAL, max31865_buffer, 2);
|
||||
}
|
||||
else {
|
||||
max31865_current_state = MAX_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
void max31865_init(uint8_t rdt_type) {
|
||||
|
||||
uint8_t * rx_data;
|
||||
|
||||
if (rdt_type == MAX_3WIRE) {
|
||||
max31865_rdt_sensor_type = 1;
|
||||
}
|
||||
|
|
@ -84,30 +143,75 @@ void max31865_init(uint8_t rdt_type) {
|
|||
|
||||
max31865_conversion_mode = 1;
|
||||
|
||||
max31865_buffer[0] = 0x80;
|
||||
max31865_buffer[1] = max31865_get_config_register();
|
||||
// max31865_buffer[0] = 0x80;
|
||||
// max31865_buffer[1] = max31865_get_config_register();
|
||||
//
|
||||
// spi_tx_data(1, SPI_TX_FROM_EXTERNAL, max31865_buffer, 2);
|
||||
|
||||
spi_tx_data(1, max31865_buffer, 2);
|
||||
max31865_send_config_measurement();
|
||||
|
||||
spi_wait_for_comms_done();
|
||||
|
||||
// read adres of configuation register
|
||||
max31865_buffer[0] = 0x00;
|
||||
max31865_buffer[1] = 0x00;
|
||||
// // read adres of configuation register
|
||||
// max31865_buffer[0] = 0x00;
|
||||
// max31865_buffer[1] = 0x00;
|
||||
//
|
||||
// // read data for verifiaction
|
||||
// spi_rx_tx_data(1, SPI_TX_FROM_EXTERNAL, SPI_USE_INTERNAL_RX_BUF, max31865_buffer, 30, 1);
|
||||
|
||||
// read data for verifiaction
|
||||
spi_rx_tx_data(1, 0, max31865_buffer, 30, 1);
|
||||
max31865_request_registers();
|
||||
|
||||
spi_wait_for_comms_done();
|
||||
|
||||
if (max31865_buffer[0] == max31865_get_config_register()) {
|
||||
rx_data = spi_get_rx_data();
|
||||
|
||||
if (rx_data[0] == max31865_get_config_register()) {
|
||||
max31865_ok = 1;
|
||||
}
|
||||
else {
|
||||
max31865_ok = 0;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void max31865_start_measurement(void) {
|
||||
/**
|
||||
* This pooler shall be called in two seconds interval
|
||||
*/
|
||||
void max31865_pool(void) {
|
||||
|
||||
switch (max31865_current_state) {
|
||||
case MAX_IDLE:
|
||||
// MAX31865 is powered up but not initialized
|
||||
if (max31865_rdt_sensor_type == 1) {
|
||||
max31865_init(MAX_3WIRE);
|
||||
}
|
||||
else {
|
||||
max31865_init(MAX_4WIRE);
|
||||
}
|
||||
|
||||
max31865_current_state = MAX_INITIALIZED;
|
||||
break;
|
||||
case MAX_INITIALIZED:
|
||||
// initialized and ready to start measurement
|
||||
max31865_start_singleshot = 1;
|
||||
|
||||
|
||||
break;
|
||||
case MAX_ERROR:
|
||||
break;
|
||||
case MAX_MEASUREMENT_STARTED:
|
||||
break;
|
||||
case MAX_REGISTER_REQUESTED:
|
||||
break;
|
||||
case MAX_SHUTDOWN:
|
||||
// MAX31965 is powered up and initialized but PT bias is disabled
|
||||
// and no measurement is ongoing
|
||||
break;
|
||||
case MAX_POWER_OFF:
|
||||
// supply voltage for MAX31865 is powered off and no communication
|
||||
// is currently possible
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int32_t max31865_get_result(max31865_qf_t * quality_factor) {
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue