From a6d8a5768371d4c05a2671747d71800d8afc21cb Mon Sep 17 00:00:00 2001 From: Mateusz Lubecki Date: Sun, 25 Sep 2022 17:12:42 +0200 Subject: [PATCH] daily --- .../system/src/drivers/subdir.mk | 3 + .../system/src/drivers/subdir.mk | 3 + include/aprsis.h | 2 +- src/aprsis.c | 2 +- src/it_handlers.c | 8 + src/main.c | 13 +- .../include/drivers/l4/spi_speed_stm32l4x.h | 31 +++ system/include/drivers/max31865.h | 27 +++ system/include/drivers/spi.h | 12 +- system/include/gsm/sim800c_gprs.h | 2 +- system/src/drivers/l4/spi_stm32l4xx.c | 200 ++++++++++++++---- system/src/drivers/max31865.c | 115 ++++++++++ system/src/gsm/sim800c.c | 3 + system/src/gsm/sim800c_gprs.c | 15 +- 14 files changed, 379 insertions(+), 57 deletions(-) create mode 100644 system/include/drivers/l4/spi_speed_stm32l4x.h create mode 100644 system/include/drivers/max31865.h create mode 100644 system/src/drivers/max31865.c diff --git a/STM32F100_ParaTNC/system/src/drivers/subdir.mk b/STM32F100_ParaTNC/system/src/drivers/subdir.mk index db96781..6c55961 100644 --- a/STM32F100_ParaTNC/system/src/drivers/subdir.mk +++ b/STM32F100_ParaTNC/system/src/drivers/subdir.mk @@ -8,6 +8,7 @@ C_SRCS += \ ../system/src/drivers/bme280.c \ ../system/src/drivers/dallas.c \ ../system/src/drivers/dma_helper_functions.c \ +../system/src/drivers/max31865.c \ ../system/src/drivers/ms5611.c OBJS += \ @@ -15,6 +16,7 @@ OBJS += \ ./system/src/drivers/bme280.o \ ./system/src/drivers/dallas.o \ ./system/src/drivers/dma_helper_functions.o \ +./system/src/drivers/max31865.o \ ./system/src/drivers/ms5611.o C_DEPS += \ @@ -22,6 +24,7 @@ C_DEPS += \ ./system/src/drivers/bme280.d \ ./system/src/drivers/dallas.d \ ./system/src/drivers/dma_helper_functions.d \ +./system/src/drivers/max31865.d \ ./system/src/drivers/ms5611.d diff --git a/STM32L476_ParaMETEO/system/src/drivers/subdir.mk b/STM32L476_ParaMETEO/system/src/drivers/subdir.mk index a27fd1a..e0e69cd 100644 --- a/STM32L476_ParaMETEO/system/src/drivers/subdir.mk +++ b/STM32L476_ParaMETEO/system/src/drivers/subdir.mk @@ -8,6 +8,7 @@ C_SRCS += \ ../system/src/drivers/bme280.c \ ../system/src/drivers/dallas.c \ ../system/src/drivers/dma_helper_functions.c \ +../system/src/drivers/max31865.c \ ../system/src/drivers/ms5611.c OBJS += \ @@ -15,6 +16,7 @@ OBJS += \ ./system/src/drivers/bme280.o \ ./system/src/drivers/dallas.o \ ./system/src/drivers/dma_helper_functions.o \ +./system/src/drivers/max31865.o \ ./system/src/drivers/ms5611.o C_DEPS += \ @@ -22,6 +24,7 @@ C_DEPS += \ ./system/src/drivers/bme280.d \ ./system/src/drivers/dallas.d \ ./system/src/drivers/dma_helper_functions.d \ +./system/src/drivers/max31865.d \ ./system/src/drivers/ms5611.d diff --git a/include/aprsis.h b/include/aprsis.h index d57d961..c7ee53b 100644 --- a/include/aprsis.h +++ b/include/aprsis.h @@ -24,7 +24,7 @@ typedef enum aprsis_return { extern uint8_t aprsis_connected; void aprsis_init(srl_context_t * context, gsm_sim800_state_t * gsm_modem_state, char * callsign, uint8_t ssid, uint32_t passcode, char * default_server, uint16_t default_port); -aprsis_return_t aprsis_connect_and_login(char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon); +aprsis_return_t aprsis_connect_and_login(const char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon); aprsis_return_t aprsis_connect_and_login_default(uint8_t auto_send_beacon); void aprsis_disconnect(void); void aprsis_receive_callback(srl_context_t* srl_context); diff --git a/src/aprsis.c b/src/aprsis.c index 65a474f..911ad20 100644 --- a/src/aprsis.c +++ b/src/aprsis.c @@ -96,7 +96,7 @@ void aprsis_init(srl_context_t * context, gsm_sim800_state_t * gsm_modem_state, } -aprsis_return_t aprsis_connect_and_login(char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon) { +aprsis_return_t aprsis_connect_and_login(const char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon) { // this function has blocking io uint8_t out = APRSIS_WRONG_STATE; diff --git a/src/it_handlers.c b/src/it_handlers.c index a3b0023..fe822a1 100644 --- a/src/it_handlers.c +++ b/src/it_handlers.c @@ -26,6 +26,7 @@ #include "drivers/ms5611.h" #include "drivers/serial.h" #include "drivers/i2c.h" +#include "drivers/spi.h" #include "drivers/analog_anemometer.h" #include "aprs/wx.h" #include "aprs/telemetry.h" @@ -81,6 +82,7 @@ void it_handlers_set_priorities(void) { #endif NVIC_SetPriority(TIM7_IRQn, 4); // ADC // systick + NVIC_SetPriority(SPI2_IRQn, 6); NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 6); // TX20 anemometer NVIC_SetPriority(EXTI9_5_IRQn, 7); // TX20 anemometer NVIC_SetPriority(EXTI4_IRQn, 8); // DHT22 humidity sensor @@ -110,6 +112,12 @@ void RTC_WKUP_IRQHandler(void) { } + +void SPI2_IRQHandler(void) { + NVIC_ClearPendingIRQ(SPI2_IRQn); + + spi_irq_handler(); +} #endif // Systick interrupt used for time measurements, checking timeouts and SysTick_Handler diff --git a/src/main.c b/src/main.c index f418185..b54aba3 100644 --- a/src/main.c +++ b/src/main.c @@ -25,6 +25,8 @@ #include "aprsis.h" #include "api/api.h" #include "drivers/l4/pwm_input_stm32l4x.h" +#include "drivers/l4/spi_speed_stm32l4x.h" +#include "drivers/max31865.h" #endif #include @@ -67,6 +69,7 @@ #include #include "drivers/dallas.h" #include "drivers/i2c.h" +#include "drivers/spi.h" #include "drivers/analog_anemometer.h" #include "dust_sensor/sds011.h" #include "aprs/wx.h" @@ -361,7 +364,7 @@ int main(int argc, char* argv[]){ system_clock_configure_rtc_l4(); - RCC->APB1ENR1 |= (RCC_APB1ENR1_TIM2EN | RCC_APB1ENR1_TIM3EN | RCC_APB1ENR1_TIM4EN | RCC_APB1ENR1_TIM5EN | RCC_APB1ENR1_TIM7EN | RCC_APB1ENR1_USART2EN | RCC_APB1ENR1_USART3EN | RCC_APB1ENR1_DAC1EN | RCC_APB1ENR1_I2C1EN | RCC_APB1ENR1_USART3EN); + RCC->APB1ENR1 |= (RCC_APB1ENR1_SPI2EN | RCC_APB1ENR1_TIM2EN | RCC_APB1ENR1_TIM3EN | RCC_APB1ENR1_TIM4EN | RCC_APB1ENR1_TIM5EN | RCC_APB1ENR1_TIM7EN | RCC_APB1ENR1_USART2EN | RCC_APB1ENR1_USART3EN | RCC_APB1ENR1_DAC1EN | RCC_APB1ENR1_I2C1EN | RCC_APB1ENR1_USART3EN); RCC->APB2ENR |= (RCC_APB2ENR_TIM1EN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_TIM8EN); // RCC_APB1ENR1_USART3EN RCC->AHB1ENR |= (RCC_AHB1ENR_CRCEN | RCC_AHB1ENR_DMA1EN); RCC->AHB2ENR |= (RCC_AHB2ENR_ADCEN | RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_GPIOCEN | RCC_AHB2ENR_GPIODEN); @@ -778,9 +781,15 @@ int main(int argc, char* argv[]){ #endif #endif -#ifdef _METEO // initialize i2c controller i2cConfigure(); + +#if defined(STM32L471xx) + // initialize SPI + spi_init_full_duplex_pio(SPI_MASTER_MOTOROLA, CLOCK_NORMAL_FALLING, SPI_SPEED_DIV32, SPI_ENDIAN_MSB); + + // initialize MAX RDT amplifier + max31865_init(MAX_3WIRE); #endif // initialize GPIO pins leds are connecting to diff --git a/system/include/drivers/l4/spi_speed_stm32l4x.h b/system/include/drivers/l4/spi_speed_stm32l4x.h new file mode 100644 index 0000000..8d4b7ca --- /dev/null +++ b/system/include/drivers/l4/spi_speed_stm32l4x.h @@ -0,0 +1,31 @@ +/* + * spi_speed.h + * + * Created on: Sep 25, 2022 + * Author: mateusz + */ + +#ifndef INCLUDE_DRIVERS_SPI_SPEED_H_ +#define INCLUDE_DRIVERS_SPI_SPEED_H_ + +#define SPI_CR1_BR_Pos (3U) +#define SPI_CR1_BR_Msk (0x7UL << SPI_CR1_BR_Pos) /*!< 0x00000038 */ +#define SPI_CR1_BR SPI_CR1_BR_Msk /*! + +#define MAX_3WIRE 3 +#define MAX_4WIRE 4 + +typedef enum max31865_qf_t { + MAX_QF_FULL +}max31865_qf_t; + +void max31865_init(uint8_t rdt_type); +void max31865_start_measurement(void); +int32_t max31865_get_result(max31865_qf_t * quality_factor); + + +#endif /* INCLUDE_DRIVERS_MAX31865_H_ */ diff --git a/system/include/drivers/spi.h b/system/include/drivers/spi.h index 9a5eda3..0eb9a11 100644 --- a/system/include/drivers/spi.h +++ b/system/include/drivers/spi.h @@ -14,6 +14,7 @@ #define SPI_BUSY_DIFF_SLAVE 10 #define SPI_BUSY 11 #define SPI_TX_DATA_TO_LONG 20 +#define SPI_WRONG_SLAVE_ID 30 #define SPI_UKNOWN 255 typedef enum spi_transfer_mode_t { @@ -24,10 +25,10 @@ typedef enum spi_transfer_mode_t { }spi_transfer_mode_t; typedef enum spi_clock_polarity_strobe_t { - CLOCK_NORMAL_FALLING, - CLOCK_NORMAL_RISING, - CLOCK_REVERSED_FALLING, - CLOCK_REVERSED_RISING + CLOCK_NORMAL_FALLING, // CPOL 0, CPHA 1 + CLOCK_NORMAL_RISING, // CPOL 0, CPHA 0 + CLOCK_REVERSED_FALLING, // CPOL 1, CPHA 0 + CLOCK_REVERSED_RISING // CPOL 1, CPHA 1 }spi_clock_polarity_strobe_t; #define SPI_ENDIAN_LSB 0 @@ -57,6 +58,9 @@ uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx); uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buffer, uint16_t ln_to_rx, uint16_t ln_to_tx); uint8_t * spi_get_rx_data(void); +uint8_t spi_wait_for_comms_done(void); +void spi_reset_errors(void); + void spi_irq_handler(void); void spi_timeout_handler(void); diff --git a/system/include/gsm/sim800c_gprs.h b/system/include/gsm/sim800c_gprs.h index 1cf10ac..103f540 100644 --- a/system/include/gsm/sim800c_gprs.h +++ b/system/include/gsm/sim800c_gprs.h @@ -24,7 +24,7 @@ extern const char * CONFIGURE_DTR; extern int8_t gsm_sim800_gprs_ready; -void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, config_data_gsm_t * config_gsm); +void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, const config_data_gsm_t * config_gsm); void sim800_gprs_create_apn_config_str(char * buffer, uint16_t buffer_ln); void sim800_gprs_response_callback(srl_context_t * srl_context, gsm_sim800_state_t * state, uint16_t gsm_response_start_idx); diff --git a/system/src/drivers/l4/spi_stm32l4xx.c b/system/src/drivers/l4/spi_stm32l4xx.c index 5b2a638..149aa57 100644 --- a/system/src/drivers/l4/spi_stm32l4xx.c +++ b/system/src/drivers/l4/spi_stm32l4xx.c @@ -13,6 +13,7 @@ #include #include #include +#include #include @@ -21,17 +22,17 @@ /** * State of RX part */ -spi_rx_state_t spi_rx_state; +volatile spi_rx_state_t spi_rx_state; /** * State of TX part */ -spi_tx_state_t spi_tx_state; +volatile spi_tx_state_t spi_tx_state; /** * ID of current slave the communication is established with. */ -uint32_t spi_current_slave; +uint32_t spi_current_slave = 1; /** * Amount of bytes requested to be received @@ -84,6 +85,11 @@ uint8_t spi_garbage; */ uint32_t spi_timestamp_rx_start; +/** + * How many bytes has been discarded into garbage storage + */ +uint8_t spi_garbage_counter = 0; + EVAL_SLAVE_ARR uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_strobe_t strobe, int speed, int endianess) { @@ -91,6 +97,8 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st LL_GPIO_InitTypeDef GPIO_InitTypeDef; LL_SPI_InitTypeDef SPI_InitTypeDef; + RCC->APB1RSTR1 |= RCC_APB1RSTR1_SPI2RST; + spi_rx_state = SPI_RX_IDLE; spi_tx_state = SPI_TX_IDLE; @@ -133,6 +141,7 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st GPIO_InitTypeDef.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitTypeDef.Alternate = LL_GPIO_AF_5; LL_GPIO_Init(GPIOA, &GPIO_InitTypeDef); // SPI_NSS_PT100 + LL_GPIO_SetOutputPin(GPIOA, LL_GPIO_PIN_12); GPIO_InitTypeDef.Mode = LL_GPIO_MODE_OUTPUT; GPIO_InitTypeDef.OutputType = LL_GPIO_OUTPUT_PUSHPULL; @@ -141,6 +150,9 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st GPIO_InitTypeDef.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitTypeDef.Alternate = LL_GPIO_AF_5; LL_GPIO_Init(GPIOB, &GPIO_InitTypeDef); // SPI_NSS + LL_GPIO_SetOutputPin(GPIOB, LL_GPIO_PIN_12); + + RCC->APB1RSTR1 &= (0xFFFFFFFF ^ RCC_APB1RSTR1_SPI2RST); LL_SPI_Disable(SPI2); LL_SPI_StructInit(&SPI_InitTypeDef); @@ -172,8 +184,8 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st // Configure the CPOL and CPHA bits combination switch(strobe) { case CLOCK_NORMAL_FALLING: - SPI_InitTypeDef.ClockPolarity = LL_SPI_POLARITY_LOW; - SPI_InitTypeDef.ClockPhase = LL_SPI_PHASE_2EDGE; + SPI_InitTypeDef.ClockPolarity = LL_SPI_POLARITY_LOW; // CPOL + SPI_InitTypeDef.ClockPhase = LL_SPI_PHASE_2EDGE; // CPHA break; case CLOCK_NORMAL_RISING: @@ -229,6 +241,8 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st LL_SPI_EnableIT_RXNE(SPI2); LL_SPI_EnableIT_TXE(SPI2); + NVIC_EnableIRQ(SPI2_IRQn); + return SPI_OK; } @@ -267,7 +281,7 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st //#define SPI_CR1_CPOL SPI_CR1_CPOL_Msk /*! 2) { + return SPI_WRONG_SLAVE_ID; + } + // check if tx is idle - if (spi_tx_state == SPI_TX_IDLE) { + if (spi_tx_state == SPI_TX_IDLE || spi_tx_state == SPI_TX_DONE) { - // if yes clear counter - spi_current_tx_cntr = 0; + // usually SPI communications conducts in two schemas + // 1. Transmit w/o reception (like writing to register) + // 2. Transmit and then receive (writing an address of memory/register + // to read and then receive that data) + // In both cases transmission is a first communication relation, + // so it can't be initialized if other reception is currently + // pending. + if (spi_rx_state == SPI_RX_IDLE || spi_rx_state == SPI_RX_DONE) { - // check if external or internal buffer shall be used - if (tx_buffer == 0) { - spi_tx_buffer_ptr = spi_tx_buffer; + spi_tx_state = SPI_TX_TXING; - // check if internal buffer has enought room for data - if (ln_to_tx <= SPI_BUFFER_LN) { - // clear the buffer - memset(spi_tx_buffer, 0x00, SPI_BUFFER_LN); + spi_current_slave = slave_id; - // set the lenght + // if yes clear counter + spi_current_tx_cntr = 0; + + // check if external or internal buffer shall be used + if (tx_buffer == 0) { spi_tx_buffer_ptr = spi_tx_buffer; - // copy the content into a buffer - memcpy(spi_tx_buffer_ptr, tx_buffer, ln_to_tx); + // check if internal buffer has enought room for data + if (ln_to_tx <= SPI_BUFFER_LN) { + // clear the buffer + memset(spi_tx_buffer, 0x00, SPI_BUFFER_LN); - // set amount of data for transmission - spi_tx_bytes_rq = ln_to_tx; + // set the lenght + spi_tx_buffer_ptr = spi_tx_buffer; + + // copy the content into a buffer + memcpy(spi_tx_buffer_ptr, tx_buffer, ln_to_tx); + + // set amount of data for transmission + spi_tx_bytes_rq = ln_to_tx; + } + else { + out = SPI_TX_DATA_TO_LONG; + } } else { - out = SPI_TX_DATA_TO_LONG; + // if external buffer shall be sent + spi_tx_buffer_ptr = tx_buffer; + + spi_tx_bytes_rq = ln_to_tx; } - } - else { - // if external buffer shall be sent - spi_tx_buffer_ptr = tx_buffer; - spi_tx_bytes_rq = ln_to_tx; - } - - if (spi_rx_state == SPI_RX_IDLE || spi_rx_state == SPI_RX_DONE) { spi_enable(); } } @@ -332,8 +362,14 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff uint8_t out = SPI_UKNOWN; + if (slave_id == 0 || slave_id > 2) { + return SPI_WRONG_SLAVE_ID; + } + // check if SPI is busy - if (spi_rx_state == SPI_RX_IDLE && spi_tx_state == SPI_TX_IDLE) { + if (spi_rx_state == SPI_RX_IDLE && (spi_tx_state == SPI_TX_IDLE || spi_tx_state == SPI_TX_DONE)) { + + spi_current_slave = slave_id; spi_current_rx_cntr = 0; spi_current_tx_cntr = 0; @@ -345,9 +381,23 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff // clear the buffer memset (spi_rx_buffer_ptr, 0x00, SPI_BUFFER_LN); + } + else { + spi_rx_buffer_ptr = rx_buffer; - // set the lenght - spi_rx_bytes_rq = ln_to_rx; + // clear the buffer + memset (spi_rx_buffer_ptr, 0x00, ln_to_rx); + } + + // set the lenght + spi_rx_bytes_rq = ln_to_rx; + + if ((SPI2->SR & SPI_SR_RXNE) != 0) { + // clear RX fifo queue + do { + spi_garbage_counter++; + spi_garbage = SPI2->DR & 0xFF; + } while ((SPI2->SR & SPI_SR_RXNE) != 0); } // check if external TX buffer shall be user or not @@ -385,10 +435,14 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff // set first byte for transmission SPI2->DR = spi_tx_buffer_ptr[0]; + spi_rx_state = SPI_RX_RXING; + spi_tx_state = SPI_TX_TXING; + // start trasmission spi_enable(); } else { + // exit if either transmission or reception is ongoing out = SPI_BUSY; } @@ -401,6 +455,33 @@ uint8_t * spi_get_rx_data(void) { return spi_rx_buffer_ptr; } +uint8_t spi_wait_for_comms_done(void) { + if (spi_tx_state == SPI_TX_TXING) { + while (spi_tx_state == SPI_TX_TXING); + } + + // set the tx state to ile + spi_tx_state = SPI_TX_IDLE; + + // check if read operation was successful or not + if (spi_rx_state == SPI_RX_DONE) { + spi_rx_state = SPI_RX_IDLE; + + return SPI_OK; + } + else { + spi_rx_state = SPI_RX_IDLE; + + return SPI_UKNOWN; + } +} + +void spi_reset_errors(void) { + if (spi_rx_state == SPI_RX_ERROR_MODF || spi_rx_state == SPI_RX_ERROR_OVERRUN || spi_rx_state == SPI_RX_ERROR_TIMEOUT) { + spi_rx_state = SPI_RX_IDLE; + } +} + void spi_irq_handler(void) { // The RXNE flag is set depending on the FRXTH bit value in the SPIx_CR2 register: @@ -418,16 +499,22 @@ void spi_irq_handler(void) { // get all data from RX FIFO do { + // put received data into a buffer + spi_rx_buffer[spi_current_rx_cntr++] = SPI2->DR & 0xFF; + + // check if all data has been received if (spi_current_rx_cntr >= spi_rx_bytes_rq) { - // if yes empty the FIFO - spi_garbage = SPI2->DR & 0xFF; + // set slave select line high + LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]); // and switch the state spi_rx_state = SPI_RX_DONE; - } - else { - spi_rx_buffer[spi_current_rx_cntr++] = SPI2->DR & 0xFF; + + // and exit the loop + break; + + // RXFIFO will be purged by 'spi_disable' } } while ((SPI2->SR & SPI_SR_RXNE) != 0); } @@ -452,7 +539,11 @@ void spi_irq_handler(void) { else { // finish transmission spi_tx_state = SPI_TX_DONE; + + break; } + // if there are only two or one byte for slave device + // TXE flag won't be cleared } while ((SPI2->SR & SPI_SR_TXE)); } } @@ -506,7 +597,7 @@ void spi_irq_handler(void) { } // disable SPI if all communication is done - if (spi_rx_state == SPI_RX_DONE && spi_tx_state == SPI_TX_DONE) { + if ((spi_rx_state == SPI_RX_IDLE || spi_rx_state == SPI_RX_DONE) && spi_tx_state == SPI_TX_DONE) { spi_disable(0); } @@ -536,6 +627,8 @@ void spi_enable(void) { SPI2->CR2 |= SPI_CR2_RXNEIE; SPI2->CR2 |= SPI_CR2_TXEIE; + LL_GPIO_ResetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]); + LL_SPI_Enable(SPI2); } @@ -544,15 +637,30 @@ void spi_enable(void) { * it can wait until the peripheral will be released */ void spi_disable(uint8_t immediately) { + if (immediately == 0) { while ((SPI2->SR & SPI_SR_BSY) != 0); + + LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]); + + LL_SPI_Disable(SPI2); + + if ((SPI2->SR & SPI_SR_RXNE) != 0) { + // clear RX fifo queue + do { + spi_garbage_counter++; + + spi_garbage = SPI2->DR & 0xFF; + } while ((SPI2->SR & SPI_SR_RXNE) != 0); + } + } + else { + // disable all interrupts + SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE); + SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE); + SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE); + + LL_SPI_Disable(SPI2); } - // disable all interrupts - SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE); - SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE); - SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE); - - LL_SPI_Disable(SPI2); - } diff --git a/system/src/drivers/max31865.c b/system/src/drivers/max31865.c new file mode 100644 index 0000000..6f96427 --- /dev/null +++ b/system/src/drivers/max31865.c @@ -0,0 +1,115 @@ +/* + * max31865.c + * + * Created on: Sep 25, 2022 + * Author: mateusz + */ + +#include "drivers/max31865.h" + +/** + * 1 - bias on + * 0 - bias on + */ +uint8_t max31865_vbias = 0; + +/** + * 1 - Auto (continous) + * 0 - Off (single - shot) + */ +uint8_t max31865_conversion_mode = 0; + +/** + * + */ +uint8_t max31865_start_singleshot = 0; + +/** + * 1 - 3wire + * 0 - 2 wire or 4 wire + */ +uint8_t max31865_rdt_sensor_type = 0; + +/** + * + */ +uint8_t max31865_fault_detection_config = 0; + +/** + * Set to one to clear + */ +uint8_t max31865_fault_clear = 0; + +/** + * 1 - 50Hz + * 0 - 60Hz + */ +uint8_t max31865_filter_select = 0; + +uint8_t max31865_buffer[3] = {0u}; + +uint8_t max31865_ok = 0; + +/** + * Function generates a content of configuration register basing on + */ +static uint8_t max31865_get_config_register(void) { + + uint8_t out = 0; + + out |= (max31865_filter_select & 0x01); + out |= ((max31865_fault_clear & 0x01) << 1); + out |= ((max31865_fault_detection_config & 0x03) << 2); + out |= ((max31865_rdt_sensor_type & 0x01) << 4); + out |= ((max31865_start_singleshot & 0x01) << 5); + out |= ((max31865_conversion_mode & 0x01) << 6); + out |= ((max31865_vbias & 0x01) << 7); + + return out; +} + +void max31865_init(uint8_t rdt_type) { + + uint8_t bytes[2]; + + if (rdt_type == MAX_3WIRE) { + max31865_rdt_sensor_type = 1; + } + else { + max31865_rdt_sensor_type = 0; + } + + // set filter to 50Hz + max31865_filter_select = 1; + + max31865_vbias = 1; + + bytes[0] = 0x80; + bytes[1] = max31865_get_config_register(); + + spi_tx_data(1, bytes, 2); + + spi_wait_for_comms_done(); + + // read adres of configuation register + bytes[0] = 0x00; + bytes[1] = 0x00; + + // read data for verifiaction + spi_rx_tx_data(1, max31865_buffer, bytes, 1, 1); + + spi_wait_for_comms_done(); + + if (max31865_buffer[0] == max31865_get_config_register()) { + max31865_ok = 1; + } + +} + +void max31865_start_measurement(void) { + +} + +int32_t max31865_get_result(max31865_qf_t * quality_factor) { + +} diff --git a/system/src/gsm/sim800c.c b/system/src/gsm/sim800c.c index 0b43e7f..1543253 100644 --- a/system/src/gsm/sim800c.c +++ b/system/src/gsm/sim800c.c @@ -651,6 +651,9 @@ uint8_t gsm_sim800_rx_terminating_callback(uint8_t current_data, const uint8_t * } +/** + * This is a main callback invoked, when any data has been received from GSM modem + */ void gsm_sim800_rx_done_event_handler(srl_context_t * srl_context, gsm_sim800_state_t * state) { int comparision_result = 123; diff --git a/system/src/gsm/sim800c_gprs.c b/system/src/gsm/sim800c_gprs.c index 3f4b143..8a0589e 100644 --- a/system/src/gsm/sim800c_gprs.c +++ b/system/src/gsm/sim800c_gprs.c @@ -25,10 +25,18 @@ static const char * NEWLINE = "\r\0"; static const char * STATE = "STATE: \0"; static const char * IPSTATUS = "IP STATUS\0"; -config_data_gsm_t * gsm_sim800_gprs_config_gsm; +const config_data_gsm_t * gsm_sim800_gprs_config_gsm; +/** + * Set to one if GSM radio is connected to a network and + * GPRS connection is established + */ int8_t gsm_sim800_gprs_ready = 0; +/** + * IP Address of GPRS connection retrieved from module + * using AT commands + */ char gsm_sim800_ip_address[18]; char gsm_sim800_connection_status_str[24]; @@ -45,7 +53,7 @@ inline static void gsm_sim800_replace_non_printable_with_space(char * str) { } } -void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, config_data_gsm_t * config_gsm) { +void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, const config_data_gsm_t * config_gsm) { if (*state != SIM800_ALIVE) { return; @@ -100,6 +108,9 @@ void sim800_gprs_create_apn_config_str(char * buffer, uint16_t buffer_ln) { } +/** + * This callback + */ void sim800_gprs_response_callback(srl_context_t * srl_context, gsm_sim800_state_t * state, uint16_t gsm_response_start_idx) { int comparision_result = 0;