kopia lustrzana https://github.com/SP8EBC/ParaTNC
daily
Mateusz Lubecki
rodzic
13cabee707
commit
a6d8a57683
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@ -8,6 +8,7 @@ C_SRCS += \
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../system/src/drivers/bme280.c \
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../system/src/drivers/dallas.c \
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../system/src/drivers/dma_helper_functions.c \
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../system/src/drivers/max31865.c \
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../system/src/drivers/ms5611.c
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OBJS += \
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@ -15,6 +16,7 @@ OBJS += \
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./system/src/drivers/bme280.o \
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./system/src/drivers/dallas.o \
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./system/src/drivers/dma_helper_functions.o \
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./system/src/drivers/max31865.o \
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./system/src/drivers/ms5611.o
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C_DEPS += \
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@ -22,6 +24,7 @@ C_DEPS += \
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./system/src/drivers/bme280.d \
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./system/src/drivers/dallas.d \
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./system/src/drivers/dma_helper_functions.d \
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./system/src/drivers/max31865.d \
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./system/src/drivers/ms5611.d
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@ -8,6 +8,7 @@ C_SRCS += \
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../system/src/drivers/bme280.c \
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../system/src/drivers/dallas.c \
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../system/src/drivers/dma_helper_functions.c \
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../system/src/drivers/max31865.c \
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../system/src/drivers/ms5611.c
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OBJS += \
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@ -15,6 +16,7 @@ OBJS += \
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./system/src/drivers/bme280.o \
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./system/src/drivers/dallas.o \
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./system/src/drivers/dma_helper_functions.o \
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./system/src/drivers/max31865.o \
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./system/src/drivers/ms5611.o
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C_DEPS += \
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@ -22,6 +24,7 @@ C_DEPS += \
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./system/src/drivers/bme280.d \
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./system/src/drivers/dallas.d \
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./system/src/drivers/dma_helper_functions.d \
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./system/src/drivers/max31865.d \
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./system/src/drivers/ms5611.d
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@ -24,7 +24,7 @@ typedef enum aprsis_return {
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extern uint8_t aprsis_connected;
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void aprsis_init(srl_context_t * context, gsm_sim800_state_t * gsm_modem_state, char * callsign, uint8_t ssid, uint32_t passcode, char * default_server, uint16_t default_port);
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aprsis_return_t aprsis_connect_and_login(char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon);
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aprsis_return_t aprsis_connect_and_login(const char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon);
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aprsis_return_t aprsis_connect_and_login_default(uint8_t auto_send_beacon);
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void aprsis_disconnect(void);
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void aprsis_receive_callback(srl_context_t* srl_context);
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@ -96,7 +96,7 @@ void aprsis_init(srl_context_t * context, gsm_sim800_state_t * gsm_modem_state,
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}
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aprsis_return_t aprsis_connect_and_login(char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon) {
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aprsis_return_t aprsis_connect_and_login(const char * address, uint8_t address_ln, uint16_t port, uint8_t auto_send_beacon) {
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// this function has blocking io
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uint8_t out = APRSIS_WRONG_STATE;
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@ -26,6 +26,7 @@
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#include "drivers/ms5611.h"
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#include "drivers/serial.h"
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#include "drivers/i2c.h"
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#include "drivers/spi.h"
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#include "drivers/analog_anemometer.h"
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#include "aprs/wx.h"
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#include "aprs/telemetry.h"
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@ -81,6 +82,7 @@ void it_handlers_set_priorities(void) {
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#endif
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NVIC_SetPriority(TIM7_IRQn, 4); // ADC
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// systick
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NVIC_SetPriority(SPI2_IRQn, 6);
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NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 6); // TX20 anemometer
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NVIC_SetPriority(EXTI9_5_IRQn, 7); // TX20 anemometer
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NVIC_SetPriority(EXTI4_IRQn, 8); // DHT22 humidity sensor
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@ -110,6 +112,12 @@ void RTC_WKUP_IRQHandler(void) {
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}
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void SPI2_IRQHandler(void) {
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NVIC_ClearPendingIRQ(SPI2_IRQn);
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spi_irq_handler();
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}
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#endif
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// Systick interrupt used for time measurements, checking timeouts and SysTick_Handler
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13
src/main.c
13
src/main.c
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@ -25,6 +25,8 @@
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#include "aprsis.h"
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#include "api/api.h"
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#include "drivers/l4/pwm_input_stm32l4x.h"
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#include "drivers/l4/spi_speed_stm32l4x.h"
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#include "drivers/max31865.h"
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#endif
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#include <delay.h>
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@ -67,6 +69,7 @@
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#include <wx_handler.h>
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#include "drivers/dallas.h"
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#include "drivers/i2c.h"
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#include "drivers/spi.h"
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#include "drivers/analog_anemometer.h"
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#include "dust_sensor/sds011.h"
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#include "aprs/wx.h"
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@ -361,7 +364,7 @@ int main(int argc, char* argv[]){
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system_clock_configure_rtc_l4();
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RCC->APB1ENR1 |= (RCC_APB1ENR1_TIM2EN | RCC_APB1ENR1_TIM3EN | RCC_APB1ENR1_TIM4EN | RCC_APB1ENR1_TIM5EN | RCC_APB1ENR1_TIM7EN | RCC_APB1ENR1_USART2EN | RCC_APB1ENR1_USART3EN | RCC_APB1ENR1_DAC1EN | RCC_APB1ENR1_I2C1EN | RCC_APB1ENR1_USART3EN);
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RCC->APB1ENR1 |= (RCC_APB1ENR1_SPI2EN | RCC_APB1ENR1_TIM2EN | RCC_APB1ENR1_TIM3EN | RCC_APB1ENR1_TIM4EN | RCC_APB1ENR1_TIM5EN | RCC_APB1ENR1_TIM7EN | RCC_APB1ENR1_USART2EN | RCC_APB1ENR1_USART3EN | RCC_APB1ENR1_DAC1EN | RCC_APB1ENR1_I2C1EN | RCC_APB1ENR1_USART3EN);
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RCC->APB2ENR |= (RCC_APB2ENR_TIM1EN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_TIM8EN); // RCC_APB1ENR1_USART3EN
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RCC->AHB1ENR |= (RCC_AHB1ENR_CRCEN | RCC_AHB1ENR_DMA1EN);
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RCC->AHB2ENR |= (RCC_AHB2ENR_ADCEN | RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_GPIOCEN | RCC_AHB2ENR_GPIODEN);
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@ -778,9 +781,15 @@ int main(int argc, char* argv[]){
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#endif
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#endif
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#ifdef _METEO
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// initialize i2c controller
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i2cConfigure();
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#if defined(STM32L471xx)
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// initialize SPI
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spi_init_full_duplex_pio(SPI_MASTER_MOTOROLA, CLOCK_NORMAL_FALLING, SPI_SPEED_DIV32, SPI_ENDIAN_MSB);
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// initialize MAX RDT amplifier
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max31865_init(MAX_3WIRE);
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#endif
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// initialize GPIO pins leds are connecting to
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@ -0,0 +1,31 @@
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/*
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* spi_speed.h
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*
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* Created on: Sep 25, 2022
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* Author: mateusz
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*/
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#ifndef INCLUDE_DRIVERS_SPI_SPEED_H_
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#define INCLUDE_DRIVERS_SPI_SPEED_H_
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#define SPI_CR1_BR_Pos (3U)
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#define SPI_CR1_BR_Msk (0x7UL << SPI_CR1_BR_Pos) /*!< 0x00000038 */
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#define SPI_CR1_BR SPI_CR1_BR_Msk /*!<BR[2:0] bits (Baud Rate Control) */
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#define SPI_CR1_BR_0 (0x1UL << SPI_CR1_BR_Pos) /*!< 0x00000008 */
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#define SPI_CR1_BR_1 (0x2UL << SPI_CR1_BR_Pos) /*!< 0x00000010 */
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#define SPI_CR1_BR_2 (0x4UL << SPI_CR1_BR_Pos) /*!< 0x00000020 */
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#define SPI_SPEED_DIV2 0x00000000U /*!< BaudRate control equal to fPCLK/2 */
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#define SPI_SPEED_DIV4 (SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/4 */
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#define SPI_SPEED_DIV8 (SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/8 */
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#define SPI_SPEED_DIV16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/16 */
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#define SPI_SPEED_DIV32 (SPI_CR1_BR_2) /*!< BaudRate control equal to fPCLK/32 */
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#define SPI_SPEED_DIV64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/64 */
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#define SPI_SPEED_DIV128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/128 */
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#define SPI_SPEED_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/256 */
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#endif /* INCLUDE_DRIVERS_SPI_SPEED_H_ */
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@ -0,0 +1,27 @@
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/*
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* max31865.h
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*
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* Created on: Sep 25, 2022
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* Author: mateusz
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*/
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#ifndef INCLUDE_DRIVERS_MAX31865_H_
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#define INCLUDE_DRIVERS_MAX31865_H_
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#include "drivers/spi.h"
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#include <stdint.h>
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#define MAX_3WIRE 3
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#define MAX_4WIRE 4
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typedef enum max31865_qf_t {
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MAX_QF_FULL
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}max31865_qf_t;
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void max31865_init(uint8_t rdt_type);
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void max31865_start_measurement(void);
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int32_t max31865_get_result(max31865_qf_t * quality_factor);
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#endif /* INCLUDE_DRIVERS_MAX31865_H_ */
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@ -14,6 +14,7 @@
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#define SPI_BUSY_DIFF_SLAVE 10
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#define SPI_BUSY 11
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#define SPI_TX_DATA_TO_LONG 20
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#define SPI_WRONG_SLAVE_ID 30
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#define SPI_UKNOWN 255
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typedef enum spi_transfer_mode_t {
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@ -24,10 +25,10 @@ typedef enum spi_transfer_mode_t {
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}spi_transfer_mode_t;
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typedef enum spi_clock_polarity_strobe_t {
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CLOCK_NORMAL_FALLING,
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CLOCK_NORMAL_RISING,
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CLOCK_REVERSED_FALLING,
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CLOCK_REVERSED_RISING
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CLOCK_NORMAL_FALLING, // CPOL 0, CPHA 1
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CLOCK_NORMAL_RISING, // CPOL 0, CPHA 0
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CLOCK_REVERSED_FALLING, // CPOL 1, CPHA 0
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CLOCK_REVERSED_RISING // CPOL 1, CPHA 1
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}spi_clock_polarity_strobe_t;
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#define SPI_ENDIAN_LSB 0
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@ -57,6 +58,9 @@ uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx);
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uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buffer, uint16_t ln_to_rx, uint16_t ln_to_tx);
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uint8_t * spi_get_rx_data(void);
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uint8_t spi_wait_for_comms_done(void);
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void spi_reset_errors(void);
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void spi_irq_handler(void);
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void spi_timeout_handler(void);
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@ -24,7 +24,7 @@ extern const char * CONFIGURE_DTR;
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extern int8_t gsm_sim800_gprs_ready;
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void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, config_data_gsm_t * config_gsm);
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void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, const config_data_gsm_t * config_gsm);
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void sim800_gprs_create_apn_config_str(char * buffer, uint16_t buffer_ln);
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void sim800_gprs_response_callback(srl_context_t * srl_context, gsm_sim800_state_t * state, uint16_t gsm_response_start_idx);
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@ -13,6 +13,7 @@
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#include <stm32l4xx.h>
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#include <stm32l4xx_ll_spi.h>
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#include <stm32l4xx_ll_gpio.h>
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#include <stm32l4xx_ll_rcc.h>
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#include <string.h>
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@ -21,17 +22,17 @@
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/**
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* State of RX part
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*/
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spi_rx_state_t spi_rx_state;
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volatile spi_rx_state_t spi_rx_state;
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/**
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* State of TX part
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*/
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spi_tx_state_t spi_tx_state;
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volatile spi_tx_state_t spi_tx_state;
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/**
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* ID of current slave the communication is established with.
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*/
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uint32_t spi_current_slave;
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uint32_t spi_current_slave = 1;
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/**
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* Amount of bytes requested to be received
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@ -84,6 +85,11 @@ uint8_t spi_garbage;
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*/
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uint32_t spi_timestamp_rx_start;
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/**
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* How many bytes has been discarded into garbage storage
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*/
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uint8_t spi_garbage_counter = 0;
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EVAL_SLAVE_ARR
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uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_strobe_t strobe, int speed, int endianess) {
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@ -91,6 +97,8 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st
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LL_GPIO_InitTypeDef GPIO_InitTypeDef;
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LL_SPI_InitTypeDef SPI_InitTypeDef;
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RCC->APB1RSTR1 |= RCC_APB1RSTR1_SPI2RST;
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spi_rx_state = SPI_RX_IDLE;
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spi_tx_state = SPI_TX_IDLE;
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@ -133,6 +141,7 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st
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GPIO_InitTypeDef.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitTypeDef.Alternate = LL_GPIO_AF_5;
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LL_GPIO_Init(GPIOA, &GPIO_InitTypeDef); // SPI_NSS_PT100
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LL_GPIO_SetOutputPin(GPIOA, LL_GPIO_PIN_12);
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GPIO_InitTypeDef.Mode = LL_GPIO_MODE_OUTPUT;
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GPIO_InitTypeDef.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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@ -141,6 +150,9 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st
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GPIO_InitTypeDef.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitTypeDef.Alternate = LL_GPIO_AF_5;
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LL_GPIO_Init(GPIOB, &GPIO_InitTypeDef); // SPI_NSS
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LL_GPIO_SetOutputPin(GPIOB, LL_GPIO_PIN_12);
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RCC->APB1RSTR1 &= (0xFFFFFFFF ^ RCC_APB1RSTR1_SPI2RST);
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LL_SPI_Disable(SPI2);
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LL_SPI_StructInit(&SPI_InitTypeDef);
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@ -172,8 +184,8 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st
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// Configure the CPOL and CPHA bits combination
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switch(strobe) {
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case CLOCK_NORMAL_FALLING:
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SPI_InitTypeDef.ClockPolarity = LL_SPI_POLARITY_LOW;
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SPI_InitTypeDef.ClockPhase = LL_SPI_PHASE_2EDGE;
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SPI_InitTypeDef.ClockPolarity = LL_SPI_POLARITY_LOW; // CPOL
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SPI_InitTypeDef.ClockPhase = LL_SPI_PHASE_2EDGE; // CPHA
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break;
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case CLOCK_NORMAL_RISING:
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@ -229,6 +241,8 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st
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LL_SPI_EnableIT_RXNE(SPI2);
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LL_SPI_EnableIT_TXE(SPI2);
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NVIC_EnableIRQ(SPI2_IRQn);
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return SPI_OK;
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}
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@ -267,7 +281,7 @@ uint8_t spi_init_full_duplex_pio(spi_transfer_mode_t mode, spi_clock_polarity_st
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//#define SPI_CR1_CPOL SPI_CR1_CPOL_Msk /*!<Clock Polarity */
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uint8_t spi_rx_data(uint32_t slave_id, uint8_t * rx_buffer, uint16_t ln_to_rx) {
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return 0xFF;
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}
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/**
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@ -277,42 +291,58 @@ uint8_t spi_tx_data(uint32_t slave_id, uint8_t * tx_buffer, uint16_t ln_to_tx) {
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uint8_t out = SPI_UKNOWN;
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if (slave_id == 0 || slave_id > 2) {
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return SPI_WRONG_SLAVE_ID;
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}
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// check if tx is idle
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if (spi_tx_state == SPI_TX_IDLE) {
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if (spi_tx_state == SPI_TX_IDLE || spi_tx_state == SPI_TX_DONE) {
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// if yes clear counter
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spi_current_tx_cntr = 0;
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// usually SPI communications conducts in two schemas
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// 1. Transmit w/o reception (like writing to register)
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// 2. Transmit and then receive (writing an address of memory/register
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// to read and then receive that data)
|
||||
// In both cases transmission is a first communication relation,
|
||||
// so it can't be initialized if other reception is currently
|
||||
// pending.
|
||||
if (spi_rx_state == SPI_RX_IDLE || spi_rx_state == SPI_RX_DONE) {
|
||||
|
||||
// check if external or internal buffer shall be used
|
||||
if (tx_buffer == 0) {
|
||||
spi_tx_buffer_ptr = spi_tx_buffer;
|
||||
spi_tx_state = SPI_TX_TXING;
|
||||
|
||||
// check if internal buffer has enought room for data
|
||||
if (ln_to_tx <= SPI_BUFFER_LN) {
|
||||
// clear the buffer
|
||||
memset(spi_tx_buffer, 0x00, SPI_BUFFER_LN);
|
||||
spi_current_slave = slave_id;
|
||||
|
||||
// set the lenght
|
||||
// if yes clear counter
|
||||
spi_current_tx_cntr = 0;
|
||||
|
||||
// check if external or internal buffer shall be used
|
||||
if (tx_buffer == 0) {
|
||||
spi_tx_buffer_ptr = spi_tx_buffer;
|
||||
|
||||
// copy the content into a buffer
|
||||
memcpy(spi_tx_buffer_ptr, tx_buffer, ln_to_tx);
|
||||
// check if internal buffer has enought room for data
|
||||
if (ln_to_tx <= SPI_BUFFER_LN) {
|
||||
// clear the buffer
|
||||
memset(spi_tx_buffer, 0x00, SPI_BUFFER_LN);
|
||||
|
||||
// set amount of data for transmission
|
||||
spi_tx_bytes_rq = ln_to_tx;
|
||||
// set the lenght
|
||||
spi_tx_buffer_ptr = spi_tx_buffer;
|
||||
|
||||
// copy the content into a buffer
|
||||
memcpy(spi_tx_buffer_ptr, tx_buffer, ln_to_tx);
|
||||
|
||||
// set amount of data for transmission
|
||||
spi_tx_bytes_rq = ln_to_tx;
|
||||
}
|
||||
else {
|
||||
out = SPI_TX_DATA_TO_LONG;
|
||||
}
|
||||
}
|
||||
else {
|
||||
out = SPI_TX_DATA_TO_LONG;
|
||||
// if external buffer shall be sent
|
||||
spi_tx_buffer_ptr = tx_buffer;
|
||||
|
||||
spi_tx_bytes_rq = ln_to_tx;
|
||||
}
|
||||
}
|
||||
else {
|
||||
// if external buffer shall be sent
|
||||
spi_tx_buffer_ptr = tx_buffer;
|
||||
|
||||
spi_tx_bytes_rq = ln_to_tx;
|
||||
}
|
||||
|
||||
if (spi_rx_state == SPI_RX_IDLE || spi_rx_state == SPI_RX_DONE) {
|
||||
spi_enable();
|
||||
}
|
||||
}
|
||||
|
|
@ -332,8 +362,14 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff
|
|||
|
||||
uint8_t out = SPI_UKNOWN;
|
||||
|
||||
if (slave_id == 0 || slave_id > 2) {
|
||||
return SPI_WRONG_SLAVE_ID;
|
||||
}
|
||||
|
||||
// check if SPI is busy
|
||||
if (spi_rx_state == SPI_RX_IDLE && spi_tx_state == SPI_TX_IDLE) {
|
||||
if (spi_rx_state == SPI_RX_IDLE && (spi_tx_state == SPI_TX_IDLE || spi_tx_state == SPI_TX_DONE)) {
|
||||
|
||||
spi_current_slave = slave_id;
|
||||
|
||||
spi_current_rx_cntr = 0;
|
||||
spi_current_tx_cntr = 0;
|
||||
|
|
@ -345,9 +381,23 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff
|
|||
|
||||
// clear the buffer
|
||||
memset (spi_rx_buffer_ptr, 0x00, SPI_BUFFER_LN);
|
||||
}
|
||||
else {
|
||||
spi_rx_buffer_ptr = rx_buffer;
|
||||
|
||||
// set the lenght
|
||||
spi_rx_bytes_rq = ln_to_rx;
|
||||
// clear the buffer
|
||||
memset (spi_rx_buffer_ptr, 0x00, ln_to_rx);
|
||||
}
|
||||
|
||||
// set the lenght
|
||||
spi_rx_bytes_rq = ln_to_rx;
|
||||
|
||||
if ((SPI2->SR & SPI_SR_RXNE) != 0) {
|
||||
// clear RX fifo queue
|
||||
do {
|
||||
spi_garbage_counter++;
|
||||
spi_garbage = SPI2->DR & 0xFF;
|
||||
} while ((SPI2->SR & SPI_SR_RXNE) != 0);
|
||||
}
|
||||
|
||||
// check if external TX buffer shall be user or not
|
||||
|
|
@ -385,10 +435,14 @@ uint8_t spi_rx_tx_data(uint32_t slave_id, uint8_t * rx_buffer, uint8_t * tx_buff
|
|||
// set first byte for transmission
|
||||
SPI2->DR = spi_tx_buffer_ptr[0];
|
||||
|
||||
spi_rx_state = SPI_RX_RXING;
|
||||
spi_tx_state = SPI_TX_TXING;
|
||||
|
||||
// start trasmission
|
||||
spi_enable();
|
||||
}
|
||||
else {
|
||||
// exit if either transmission or reception is ongoing
|
||||
out = SPI_BUSY;
|
||||
}
|
||||
|
||||
|
|
@ -401,6 +455,33 @@ uint8_t * spi_get_rx_data(void) {
|
|||
return spi_rx_buffer_ptr;
|
||||
}
|
||||
|
||||
uint8_t spi_wait_for_comms_done(void) {
|
||||
if (spi_tx_state == SPI_TX_TXING) {
|
||||
while (spi_tx_state == SPI_TX_TXING);
|
||||
}
|
||||
|
||||
// set the tx state to ile
|
||||
spi_tx_state = SPI_TX_IDLE;
|
||||
|
||||
// check if read operation was successful or not
|
||||
if (spi_rx_state == SPI_RX_DONE) {
|
||||
spi_rx_state = SPI_RX_IDLE;
|
||||
|
||||
return SPI_OK;
|
||||
}
|
||||
else {
|
||||
spi_rx_state = SPI_RX_IDLE;
|
||||
|
||||
return SPI_UKNOWN;
|
||||
}
|
||||
}
|
||||
|
||||
void spi_reset_errors(void) {
|
||||
if (spi_rx_state == SPI_RX_ERROR_MODF || spi_rx_state == SPI_RX_ERROR_OVERRUN || spi_rx_state == SPI_RX_ERROR_TIMEOUT) {
|
||||
spi_rx_state = SPI_RX_IDLE;
|
||||
}
|
||||
}
|
||||
|
||||
void spi_irq_handler(void) {
|
||||
|
||||
// The RXNE flag is set depending on the FRXTH bit value in the SPIx_CR2 register:
|
||||
|
|
@ -418,16 +499,22 @@ void spi_irq_handler(void) {
|
|||
|
||||
// get all data from RX FIFO
|
||||
do {
|
||||
// put received data into a buffer
|
||||
spi_rx_buffer[spi_current_rx_cntr++] = SPI2->DR & 0xFF;
|
||||
|
||||
|
||||
// check if all data has been received
|
||||
if (spi_current_rx_cntr >= spi_rx_bytes_rq) {
|
||||
// if yes empty the FIFO
|
||||
spi_garbage = SPI2->DR & 0xFF;
|
||||
// set slave select line high
|
||||
LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
|
||||
|
||||
// and switch the state
|
||||
spi_rx_state = SPI_RX_DONE;
|
||||
}
|
||||
else {
|
||||
spi_rx_buffer[spi_current_rx_cntr++] = SPI2->DR & 0xFF;
|
||||
|
||||
// and exit the loop
|
||||
break;
|
||||
|
||||
// RXFIFO will be purged by 'spi_disable'
|
||||
}
|
||||
} while ((SPI2->SR & SPI_SR_RXNE) != 0);
|
||||
}
|
||||
|
|
@ -452,7 +539,11 @@ void spi_irq_handler(void) {
|
|||
else {
|
||||
// finish transmission
|
||||
spi_tx_state = SPI_TX_DONE;
|
||||
|
||||
break;
|
||||
}
|
||||
// if there are only two or one byte for slave device
|
||||
// TXE flag won't be cleared
|
||||
} while ((SPI2->SR & SPI_SR_TXE));
|
||||
}
|
||||
}
|
||||
|
|
@ -506,7 +597,7 @@ void spi_irq_handler(void) {
|
|||
}
|
||||
|
||||
// disable SPI if all communication is done
|
||||
if (spi_rx_state == SPI_RX_DONE && spi_tx_state == SPI_TX_DONE) {
|
||||
if ((spi_rx_state == SPI_RX_IDLE || spi_rx_state == SPI_RX_DONE) && spi_tx_state == SPI_TX_DONE) {
|
||||
spi_disable(0);
|
||||
}
|
||||
|
||||
|
|
@ -536,6 +627,8 @@ void spi_enable(void) {
|
|||
SPI2->CR2 |= SPI_CR2_RXNEIE;
|
||||
SPI2->CR2 |= SPI_CR2_TXEIE;
|
||||
|
||||
LL_GPIO_ResetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
|
||||
|
||||
LL_SPI_Enable(SPI2);
|
||||
}
|
||||
|
||||
|
|
@ -544,15 +637,30 @@ void spi_enable(void) {
|
|||
* it can wait until the peripheral will be released
|
||||
*/
|
||||
void spi_disable(uint8_t immediately) {
|
||||
|
||||
if (immediately == 0) {
|
||||
while ((SPI2->SR & SPI_SR_BSY) != 0);
|
||||
|
||||
LL_GPIO_SetOutputPin((GPIO_TypeDef *)spi_slaves_cfg[spi_current_slave - 1][1], spi_slaves_cfg[spi_current_slave - 1][2]);
|
||||
|
||||
LL_SPI_Disable(SPI2);
|
||||
|
||||
if ((SPI2->SR & SPI_SR_RXNE) != 0) {
|
||||
// clear RX fifo queue
|
||||
do {
|
||||
spi_garbage_counter++;
|
||||
|
||||
spi_garbage = SPI2->DR & 0xFF;
|
||||
} while ((SPI2->SR & SPI_SR_RXNE) != 0);
|
||||
}
|
||||
}
|
||||
else {
|
||||
// disable all interrupts
|
||||
SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE);
|
||||
SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE);
|
||||
SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE);
|
||||
|
||||
LL_SPI_Disable(SPI2);
|
||||
}
|
||||
|
||||
// disable all interrupts
|
||||
SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_ERRIE);
|
||||
SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_RXNEIE);
|
||||
SPI2->CR2 &= (0xFFFFFFFF ^ SPI_CR2_TXEIE);
|
||||
|
||||
LL_SPI_Disable(SPI2);
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,115 @@
|
|||
/*
|
||||
* max31865.c
|
||||
*
|
||||
* Created on: Sep 25, 2022
|
||||
* Author: mateusz
|
||||
*/
|
||||
|
||||
#include "drivers/max31865.h"
|
||||
|
||||
/**
|
||||
* 1 - bias on
|
||||
* 0 - bias on
|
||||
*/
|
||||
uint8_t max31865_vbias = 0;
|
||||
|
||||
/**
|
||||
* 1 - Auto (continous)
|
||||
* 0 - Off (single - shot)
|
||||
*/
|
||||
uint8_t max31865_conversion_mode = 0;
|
||||
|
||||
/**
|
||||
*
|
||||
*/
|
||||
uint8_t max31865_start_singleshot = 0;
|
||||
|
||||
/**
|
||||
* 1 - 3wire
|
||||
* 0 - 2 wire or 4 wire
|
||||
*/
|
||||
uint8_t max31865_rdt_sensor_type = 0;
|
||||
|
||||
/**
|
||||
*
|
||||
*/
|
||||
uint8_t max31865_fault_detection_config = 0;
|
||||
|
||||
/**
|
||||
* Set to one to clear
|
||||
*/
|
||||
uint8_t max31865_fault_clear = 0;
|
||||
|
||||
/**
|
||||
* 1 - 50Hz
|
||||
* 0 - 60Hz
|
||||
*/
|
||||
uint8_t max31865_filter_select = 0;
|
||||
|
||||
uint8_t max31865_buffer[3] = {0u};
|
||||
|
||||
uint8_t max31865_ok = 0;
|
||||
|
||||
/**
|
||||
* Function generates a content of configuration register basing on
|
||||
*/
|
||||
static uint8_t max31865_get_config_register(void) {
|
||||
|
||||
uint8_t out = 0;
|
||||
|
||||
out |= (max31865_filter_select & 0x01);
|
||||
out |= ((max31865_fault_clear & 0x01) << 1);
|
||||
out |= ((max31865_fault_detection_config & 0x03) << 2);
|
||||
out |= ((max31865_rdt_sensor_type & 0x01) << 4);
|
||||
out |= ((max31865_start_singleshot & 0x01) << 5);
|
||||
out |= ((max31865_conversion_mode & 0x01) << 6);
|
||||
out |= ((max31865_vbias & 0x01) << 7);
|
||||
|
||||
return out;
|
||||
}
|
||||
|
||||
void max31865_init(uint8_t rdt_type) {
|
||||
|
||||
uint8_t bytes[2];
|
||||
|
||||
if (rdt_type == MAX_3WIRE) {
|
||||
max31865_rdt_sensor_type = 1;
|
||||
}
|
||||
else {
|
||||
max31865_rdt_sensor_type = 0;
|
||||
}
|
||||
|
||||
// set filter to 50Hz
|
||||
max31865_filter_select = 1;
|
||||
|
||||
max31865_vbias = 1;
|
||||
|
||||
bytes[0] = 0x80;
|
||||
bytes[1] = max31865_get_config_register();
|
||||
|
||||
spi_tx_data(1, bytes, 2);
|
||||
|
||||
spi_wait_for_comms_done();
|
||||
|
||||
// read adres of configuation register
|
||||
bytes[0] = 0x00;
|
||||
bytes[1] = 0x00;
|
||||
|
||||
// read data for verifiaction
|
||||
spi_rx_tx_data(1, max31865_buffer, bytes, 1, 1);
|
||||
|
||||
spi_wait_for_comms_done();
|
||||
|
||||
if (max31865_buffer[0] == max31865_get_config_register()) {
|
||||
max31865_ok = 1;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void max31865_start_measurement(void) {
|
||||
|
||||
}
|
||||
|
||||
int32_t max31865_get_result(max31865_qf_t * quality_factor) {
|
||||
|
||||
}
|
||||
|
|
@ -651,6 +651,9 @@ uint8_t gsm_sim800_rx_terminating_callback(uint8_t current_data, const uint8_t *
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* This is a main callback invoked, when any data has been received from GSM modem
|
||||
*/
|
||||
void gsm_sim800_rx_done_event_handler(srl_context_t * srl_context, gsm_sim800_state_t * state) {
|
||||
|
||||
int comparision_result = 123;
|
||||
|
|
|
|||
|
|
@ -25,10 +25,18 @@ static const char * NEWLINE = "\r\0";
|
|||
static const char * STATE = "STATE: \0";
|
||||
static const char * IPSTATUS = "IP STATUS\0";
|
||||
|
||||
config_data_gsm_t * gsm_sim800_gprs_config_gsm;
|
||||
const config_data_gsm_t * gsm_sim800_gprs_config_gsm;
|
||||
|
||||
/**
|
||||
* Set to one if GSM radio is connected to a network and
|
||||
* GPRS connection is established
|
||||
*/
|
||||
int8_t gsm_sim800_gprs_ready = 0;
|
||||
|
||||
/**
|
||||
* IP Address of GPRS connection retrieved from module
|
||||
* using AT commands
|
||||
*/
|
||||
char gsm_sim800_ip_address[18];
|
||||
|
||||
char gsm_sim800_connection_status_str[24];
|
||||
|
|
@ -45,7 +53,7 @@ inline static void gsm_sim800_replace_non_printable_with_space(char * str) {
|
|||
}
|
||||
}
|
||||
|
||||
void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, config_data_gsm_t * config_gsm) {
|
||||
void sim800_gprs_initialize(srl_context_t * srl_context, gsm_sim800_state_t * state, const config_data_gsm_t * config_gsm) {
|
||||
|
||||
if (*state != SIM800_ALIVE) {
|
||||
return;
|
||||
|
|
@ -100,6 +108,9 @@ void sim800_gprs_create_apn_config_str(char * buffer, uint16_t buffer_ln) {
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* This callback
|
||||
*/
|
||||
void sim800_gprs_response_callback(srl_context_t * srl_context, gsm_sim800_state_t * state, uint16_t gsm_response_start_idx) {
|
||||
|
||||
int comparision_result = 0;
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue