rtc and wakeup configuration

pull/7/head
Mateusz Lubecki 2021-08-21 22:44:01 +02:00
rodzic ff89d138cd
commit 7f66de28ce
6 zmienionych plików z 154 dodań i 100 usunięć

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@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals/&gt;&#10;"/>
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals&gt;&#10; &lt;peripheral name=&quot;RCC&quot;/&gt;&#10; &lt;peripheral name=&quot;PWR&quot;/&gt;&#10; &lt;peripheral name=&quot;RTC&quot;/&gt;&#10; &lt;peripheral name=&quot;EXTI&quot;/&gt;&#10;&lt;/peripherals&gt;&#10;"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>

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@ -21,15 +21,12 @@
/* ------------------ */
//#define PARATNC_HWREV_A
//#define PARATNC_HWREV_B
#define PARATNC_HWREV_B
//#define PARATNC_HWREV_C
#define PARAMETEO
/* ---------------------------- */
/* WEATHER/METEO CONFIGURATION */
// If none of those three sources are chosen (uncommented) the software will use internal sensors
//#define _UMB_MASTER
@ -49,8 +46,8 @@
/******** INTERNAL SENSORS CONFIGURATION *****************/
//#define _ANEMOMETER_TX20 // Use TX20 as an internal anemometer
#define _ANEMOMETER_ANALOGUE // Use analogue/mechanical (like Davis 6410) as an internal anemometr
#define _ANEMOMETER_PULSES_IN_10SEC_PER_ONE_MS_OF_WINDSPEED 10
//#define _ANEMOMETER_ANALOGUE // Use analogue/mechanical (like Davis 6410) as an internal anemometr
//#define _ANEMOMETER_PULSES_IN_10SEC_PER_ONE_MS_OF_WINDSPEED 10
//#define _SENSOR_MS5611
#define _SENSOR_BME280
@ -65,31 +62,6 @@
/******** INTERNAL SENSORS CONFIGURATION *****************/
/*************** DATA SOURCES CONFIG ***********************/
//#define _TEMPERATURE_INTERNAL
//#define _TEMPERATURE_UMB
//#define _TEMPERATURE_RTU
//#define _TEMPERATURE_DAVIS
//
//#define _PRESSURE_INTERNAL
//#define _PRESSURE_UMB
//#define _PRESSURE_RTU
//#define _PRESSURE_DAVIS
//
//#define _HUMIDITY_INTERNAL
//#define _HUMIDITY_UMB
//#define _HUMIDITY_RTU
//#define _HUMIDITY_DAVIS
//
//
//#define _WIND_INTERNAL
//#define _WIND_UMB
//#define _WIND_RTU
//#define _WIND_FULL_RTU
//#define _WIND_DAVIS
/*************** DATA SOURCES CONFIG ***********************/
/* WEATHER/METEO CONFIGURATION */
/* ---------------------------- */
@ -98,13 +70,13 @@
// and switch device to "pure" kiss TNC operation. Packets from PC will be transmitted normally.
// Coordines should be in APRS decimal format DDDMM.SS for Longitude and DDMM.SS for latitude
#define _CALL "SP8EBC"
#define _SSID 1
#define _LAT 4948.82
#define _CALL "SR9WXY"
#define _SSID 0
#define _LAT 4935.25
#define _LATNS 'N'
#define _LON 01903.50
#define _LON 01931.00
#define _LONWE 'E'
#define _COMMENT "Set Your configuration in this file and rename to station_config.h"
#define _COMMENT "DigiW1 + WX = TXPower 10W = Stacja GOPR Markowe Szczawiny = sp8ebc@interia.pl"
// You can use only one of these below defines to choose symbol. Meteo data are are always transmitted with blue WX symbol
//#define _SYMBOL_DIGI // uncomment if you want digi symbol(green star with D inside)
@ -119,20 +91,20 @@
// Uncomment one of these two defines to choose what path You want. If you uncommend both of them or
// if you keep both commended path will be completely disabled. CALL-S>AKLPRZ:data
#define _WIDE1_PATH // CALL-S>AKLPRZ,WIDE1-1:data
//#define _WIDE1_PATH // CALL-S>AKLPRZ,WIDE1-1:data
//#define _WIDE21_PATH // CALL-S>AKLPRZ,WIDE2-1:data
// Comment this to disable beacon auto sending during startup (this can be risky if RF feedback occur)
//#define _BCN_ON_STARTUP
#define _WX_INTERVAL 4 // WX packet interval in minutes
#define _BCN_INTERVAL 45 // Own beacon interval in minutes
#define _WX_INTERVAL 5 // WX packet interval in minutes
#define _BCN_INTERVAL 22 // Own beacon interval in minutes
#define _PTT_PUSHPULL // Uncomment this if you want PTT line to work as Push-pull instead of Open Drain
#define _SERIAL_BAUDRATE 9600
// Transmitting delay
#define _DELAY_BASE 20 // * 50ms. For example setting 10 gives 500msec delay. Maximum value is 20
#define _DELAY_BASE 10 // * 50ms. For example setting 10 gives 500msec delay. Maximum value is 20
//#define _RANDOM_DELAY // adds random delay TO fixed time set by _DELAY_BASE. This additional time can be
// from 100ms up to 1 sec in 100ms steps. Values are drawn from samples going from ADC
// so it is better to use Unsquelched output in radio to provide much more randomness
@ -170,7 +142,7 @@
#define _RTU_SLAVE_ID_1 0x01
#define _RTU_SLAVE_FUNC_1 0x03
#define _RTU_SLAVE_ADDR_1 0x00
#define _RTU_SLAVE_LENGHT_1 0x01
#define _RTU_SLAVE_LENGHT_1 0x04
#define _RTU_SLAVE_SCALING_A_1 0
#define _RTU_SLAVE_SCALING_B_1 1
#define _RTU_SLAVE_SCALING_C_1 0
@ -203,25 +175,6 @@
#define _RTU_SLAVE_SCALING_C_4 0
#define _RTU_SLAVE_SCALING_D_4 1
#define _RTU_SLAVE_ID_5 0x00
#define _RTU_SLAVE_FUNC_5 0x00
#define _RTU_SLAVE_ADDR_5 0x03
//#define _RTU_SLAVE_LENGHT_4 0x01
#define _RTU_SLAVE_SCALING_A_5 0
#define _RTU_SLAVE_SCALING_B_5 1
#define _RTU_SLAVE_SCALING_C_5 0
#define _RTU_SLAVE_SCALING_D_5 1
#define _RTU_SLAVE_ID_6 0x00
#define _RTU_SLAVE_FUNC_6 0x00
#define _RTU_SLAVE_ADDR_6 0x00
//#define _RTU_SLAVE_LENGHT_4 0x01
#define _RTU_SLAVE_SCALING_A_6 0
#define _RTU_SLAVE_SCALING_B_6 1
#define _RTU_SLAVE_SCALING_C_6 0
#define _RTU_SLAVE_SCALING_D_6 1
//#define _RTU_SLAVE_TEMPERATURE_SOURCE 1
#define _RTU_SLAVE_HUMIDITY_SOURCE 2
//#define _RTU_SLAVE_PRESSURE_SOURCE 3

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@ -78,6 +78,18 @@ void it_handlers_set_priorities(void) {
}
#ifdef STM32L471xx
void RTC_WKUP_IRQHandler(void) {
// clear pending interrupt
NVIC_ClearPendingIRQ(RTC_WKUP_IRQn);
RTC->ISR &= (0xFFFFFFFF ^ RTC_ISR_WUTF_Msk);
EXTI->PR1 |= EXTI_PR1_PIF20;
}
#endif
// Systick interrupt used for time measurements, checking timeouts and SysTick_Handler
void SysTick_Handler(void) {

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@ -198,7 +198,7 @@ char after_tx_lock;
unsigned short rx10m = 0, tx10m = 0, digi10m = 0, digidrop10m = 0, kiss10m = 0;
#if defined(PARAMETEO)
#if defined(STM32L471xx)
LL_GPIO_InitTypeDef GPIO_InitTypeDef;
#endif
@ -255,14 +255,20 @@ int main(int argc, char* argv[]){
BKP->DR6 = 0;
#endif
#if defined(PARAMETEO)
SystemCoreClockUpdateL4();
#if defined(STM32L471xx)
system_clock_update_l4();
if (SystemClock_Config_L4() != 0) {
if (system_clock_configure_l4() != 0) {
HAL_NVIC_SystemReset();
}
SystemCoreClockUpdateL4();
// enable access to PWR control registers
RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN;
system_clock_configure_rtc_l4();
system_clock_update_l4();
RCC->APB1ENR1 |= (RCC_APB1ENR1_TIM2EN | RCC_APB1ENR1_TIM3EN | RCC_APB1ENR1_TIM4EN | RCC_APB1ENR1_TIM7EN | RCC_APB1ENR1_USART2EN | RCC_APB1ENR1_USART3EN | RCC_APB1ENR1_DAC1EN | RCC_APB1ENR1_I2C1EN);
RCC->APB2ENR |= (RCC_APB2ENR_TIM1EN | RCC_APB2ENR_USART1EN);

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@ -8,8 +8,8 @@
#ifndef INCLUDE_CMSIS_STM32L4XX_SYSTEM_STM32L4XX_H_
#define INCLUDE_CMSIS_STM32L4XX_SYSTEM_STM32L4XX_H_
void SystemCoreClockUpdateL4(void);
int SystemClock_Config_L4(void);
void system_clock_update_l4(void); // SystemCoreClockUpdateL4
int system_clock_configure_l4(void); // SystemClock_Config_L4
int system_clock_configure_rtc_l4(void);
#endif /* INCLUDE_CMSIS_STM32L4XX_SYSTEM_STM32L4XX_H_ */

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@ -1,4 +1,8 @@
/**
*
* WARNING! This file has been highly modified by // ML during ParaTNC porting
* from STM32F100 to STM32L4xx family
*
******************************************************************************
* @file system_stm32l4xx.c
* @author MCD Application Team
@ -111,6 +115,9 @@
* @{
*/
#define SYSTEM_CLOCK_RTC_CLOCK_TIMEOUT 0xFFFF
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
@ -272,7 +279,7 @@ void SystemInit(void)
*
* @retval None
*/
void SystemCoreClockUpdateL4(void)
void system_clock_update_l4(void)
{
uint32_t tmp, msirange, pllvco, pllsource, pllm, pllr;
@ -344,12 +351,12 @@ void SystemCoreClockUpdateL4(void)
* @brief System Clock Configuration
* @retval None
*/
int SystemClock_Config_L4(void)
int system_clock_configure_l4(void)
{
/** Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
//HAL_PWR_EnableBkUpAccess();
//__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
// set the flash latency
FLASH->ACR |= FLASH_ACR_LATENCY_2WS;
@ -399,47 +406,123 @@ int SystemClock_Config_L4(void)
RCC->PLLCFGR |= RCC_PLLCFGR_PLLPEN;
RCC->PLLCFGR |= RCC_PLLCFGR_PLLQEN;
// turn on LSI
// turn on LSI (required by IWDG)
RCC->CSR |= RCC_CSR_LSION;
// turn on LSE
RCC->BDCR |= RCC_BDCR_LSEON;
// select PLL as a system clock
RCC->CFGR |= RCC_CFGR_SW_PLL;
// wait for the clock to switch
while ((RCC->CFGR & RCC_CFGR_SWS_PLL) != RCC_CFGR_SWS_PLL);
// if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
// {
// return -2;
// }
// PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
// |RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_USART3
// |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_RNG
// |RCC_PERIPHCLK_ADC;
// PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
// PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
// PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
// PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
// PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
// PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
// PeriphClkInit.RngClockSelection = RCC_RNGCLKSOURCE_PLLSAI1;
// PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
// PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
// PeriphClkInit.PLLSAI1.PLLSAI1N = 12;
// PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
// PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV4;
// PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV4;
// PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK;
// configure clock sources for some peripherals
RCC->CCIPR |= (RCC_CCIPR_ADCSEL | RCC_CCIPR_CLK48SEL_1); // system clock selected for ADC
return 0;
}
int system_clock_configure_rtc_l4(void) {
int retval = 0;
volatile uint32_t timeout_counter = 0;
// check if LSE is working now
uint8_t lse_is_working = ((RCC->BDCR & RCC_BDCR_LSERDY) > 0) ? 1 : 0;
// if LSE is not working reinitialize everything
if (lse_is_working == 0) {
// reset backup domain
RCC->BDCR |= RCC_BDCR_BDRST;
// wait for the reset
while (timeout_counter < SYSTEM_CLOCK_RTC_CLOCK_TIMEOUT) {
// wait a little bit for a reset to be done
timeout_counter++;
}
// but clear reset flag before
RCC->BDCR &= (0xFFFFFFFF ^ RCC_BDCR_BDRST);
// enable access to backup domain
PWR->CR1 |= PWR_CR1_DBP;
// set the clock source for RTC clock to LSE
RCC->BDCR |= RCC_BDCR_RTCSEL_0;
// set LSE quartz driving to medium-high
RCC->BDCR |= RCC_BDCR_LSEDRV_1;
// turn on LSE
RCC->BDCR |= RCC_BDCR_LSEON;
// wait for LSE to start
while((RCC->BDCR & RCC_BDCR_LSERDY) == 0);
// starting RTC
RCC->BDCR |= RCC_BDCR_RTCEN;
// enable write access to RTC registers by writing two magic words
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
// enter the clock set mode
RTC->ISR |= RTC_ISR_INIT;
// wait for going into clock set mode
while((RTC->ISR & RTC_ISR_INITF) == 0);
// set date
RTC->DR = 0x0021A820;
// set time
RTC->TR = 0x00232711;
// exit RTC set mode
RTC->ISR &= (0xFFFFFFFF ^ RTC_ISR_INIT);
// disable wakeup timer
RTC->CR &= (0xFFFFFFFF ^ RTC_CR_WUTE);
// wait for wakeup timer to disable
while((RTC->ISR & RTC_ISR_WUTWF) == 0);
// set the source clock for RTC as CK_SPRE
RTC->CR |= RTC_CR_WUCKSEL_2;
// set auto wakeup every 300 seconds
RTC->WUTR = 300;
// start wakeup timer once again
RTC->CR |= RTC_CR_WUTE;
// enabling wakeup interrupt
RTC->CR |= RTC_CR_WUTIE;
}
// enable 20th EXTI Line (RTC wakeup timer)
EXTI->IMR1 |= EXTI_IMR1_IM20;
// set 20th EXTI line to rising trigger
EXTI->RTSR1 |= EXTI_RTSR1_RT20;
// by enabling this all pending interrupt will wake up cpu from low-power mode, even from those disabled in NVIC
SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
// enable write access to RTC registers by writing two magic words (in case that backup domain hasn't been reseted
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
RTC->ISR &= (0xFFFFFFFF ^ RTC_ISR_WUTF_Msk);
// enable wakeup interrupt
NVIC_EnableIRQ(RTC_WKUP_IRQn);
return retval;
}
/**
* @}