kopia lustrzana https://github.com/SP8EBC/ParaTNC
crc32 calculation replaced with software library
Mateusz Lubecki
rodzic
e00ceede9a
commit
2c100b3eeb
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@ -14,6 +14,7 @@ C_SRCS += \
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../src/config_data_first.c \
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../src/config_data_second.c \
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../src/configuration_handler.c \
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../src/crc_.c \
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../src/delay.c \
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../src/dummy.c \
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../src/float_to_string.c \
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@ -46,6 +47,7 @@ OBJS += \
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./src/config_data_first.o \
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./src/config_data_second.o \
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./src/configuration_handler.o \
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./src/crc_.o \
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./src/delay.o \
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./src/dummy.o \
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./src/float_to_string.o \
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@ -78,6 +80,7 @@ C_DEPS += \
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./src/config_data_first.d \
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./src/config_data_second.d \
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./src/configuration_handler.d \
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./src/crc_.d \
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./src/delay.d \
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./src/dummy.d \
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./src/float_to_string.d \
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@ -55,6 +55,10 @@ const uint32_t * const config_section_first_start = (const uint32_t *)CONFIG_S
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const uint32_t * const config_section_second_start = (const uint32_t *)CONFIG_SECTION_SECOND_START;
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const uint32_t * const config_section_default_start = (const uint32_t *)CONFIG_SECTION_DEFAULT_START;
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#ifdef PARAMETEO
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#define STRUCT_COUNT 6
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#endif
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#ifdef STM32L471xx
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const uint16_t * config_data_pgm_cntr_first_ptr = (uint16_t*)(CONFIG_SECTION_FIRST_START + CONFIG_MODE_PGM_CNTR);
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const uint16_t * config_data_pgm_cntr_second_ptr = (uint16_t*)(CONFIG_SECTION_SECOND_START + CONFIG_MODE_PGM_CNTR);
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@ -78,6 +82,8 @@ const config_data_gsm_t * config_data_gsm_default_ptr = (const config_data_gsm_t
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#endif
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#ifdef STM32F10X_MD_VL
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#define STRUCT_COUNT 5
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const uint16_t * config_data_pgm_cntr_first_ptr = &config_data_pgm_cntr_first;
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const uint16_t * config_data_pgm_cntr_second_ptr = &config_data_pgm_cntr_second;
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@ -329,6 +335,12 @@ static int configuration_handler_program_data(volatile void * source, volatile v
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uint32_t configuration_handler_check_crc(void) {
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// last four bytes of a configuration blocks holds the CRC32 value itself.
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// four bytes before CRC is used to store programming timestamp,
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// which is not included into CRC calculation.
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// four bytes AFTER a crc is not used at all and is kept due to
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// STM32L4xx target limitations which require 64 bit aligned write block size
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uint32_t out = 0;
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// crc stored in the configuration section
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@ -337,32 +349,8 @@ uint32_t configuration_handler_check_crc(void) {
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// calculated CRC value
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uint32_t crc_current = 0;
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#ifdef STM32F10X_MD_VL
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// reset CRC engine
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CRC_ResetDR();
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// calculate CRC over everything from config_section_first except the last word which constit crc value itself
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crc_current = CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
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// add 0x0 as a placeholder for CRC value
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//crc_current = CRC_CalcCRC(0x0);
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#endif
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#ifdef STM32L471xx
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// reset CRC engine
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LL_CRC_ResetCRCCalculationUnit(CRC);
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for (int i = 0; i < CRC_32B_WORD_OFFSET - 1; i++) {
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// feed the data into CRC engine
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LL_CRC_FeedData32(CRC, *(config_section_first_start + i));
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}
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// placeholder for CRC value itself
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//CRC->DR = 0x00;
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crc_current = CRC->DR;
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#endif
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// calculate CRC over everything from config_section_first except last 12 bytes
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crc_current = calcCRC32std(config_section_first_start, CRC_OFFSET - 4, 0x04C11DB7, 0xFFFFFFFF, 0, 0, 0);
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// expected crc is stored in the last 32b word of the configuration section
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crc_expected = *(config_section_first_start + CRC_32B_WORD_OFFSET);
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@ -372,31 +360,8 @@ uint32_t configuration_handler_check_crc(void) {
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out |= 0x01;
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}
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#ifdef STM32F10X_MD_VL
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// reset the CRC engine
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CRC_ResetDR();
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// and do the same but for second section
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crc_current = CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
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// add 0x0 as a placeholder for CRC value
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//crc_current = CRC_CalcCRC((uint32_t)0x0);
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#endif
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#ifdef STM32L471xx
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// reset CRC engine
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LL_CRC_ResetCRCCalculationUnit(CRC);
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for (int i = 0; i < CRC_32B_WORD_OFFSET - 1; i++) {
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// feed the data into CRC engine
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LL_CRC_FeedData32(CRC, *(config_section_second_start + i));
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}
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// placeholder for CRC value itself
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CRC->DR = 0x00;
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crc_current = CRC->DR;
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#endif
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crc_current = calcCRC32std(config_section_second_start, CRC_OFFSET - 4, 0x04C11DB7, 0xFFFFFFFF, 0, 0, 0);
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//crc_expected = *__config_section_second_end;
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crc_expected = *(config_section_second_start + CRC_32B_WORD_OFFSET);
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@ -444,7 +409,7 @@ uint32_t configuration_handler_restore_default_first(void) {
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// check if erasure was completed successfully
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if (flash_status == FLASH_COMPLETE) {
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for (config_struct_it = 0; config_struct_it < 5; config_struct_it++) {
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for (config_struct_it = 0; config_struct_it < STRUCT_COUNT; config_struct_it++) {
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// set pointers
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switch (config_struct_it) {
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@ -473,6 +438,13 @@ uint32_t configuration_handler_restore_default_first(void) {
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target = (void *) config_data_rtu_first_ptr;
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size = sizeof(config_data_umb_t);
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break;
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#ifdef PARAMETEO
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case 5:
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source = (void *) &config_data_gsm_default;
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target = (void *) config_data_gsm_first_ptr;
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size = sizeof(config_data_umb_t);
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break;
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#endif
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}
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// program data
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@ -499,31 +471,7 @@ uint32_t configuration_handler_restore_default_first(void) {
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// if second is OK it will be used instead (if its programming counter has value three or more).
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//*(uint16_t*)&config_data_pgm_cntr_first = 0x0002u;
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#ifdef STM32F10X_MD_VL
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// resetting CRC engine
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CRC_ResetDR();
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// calculate CRC checksum of the first block
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target_crc_value = CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
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// adding finalizing 0x00
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//target_crc_value = CRC_CalcCRC((uint32_t)0x0);
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#endif
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#ifdef STM32L471xx
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// reset CRC engine
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LL_CRC_ResetCRCCalculationUnit(CRC);
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for (int i = 0; i < CRC_32B_WORD_OFFSET - 1; i++) {
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// feed the data into CRC engine
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LL_CRC_FeedData32(CRC, *(config_section_first_start + i));
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}
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// placeholder for CRC value itself
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//CRC->DR = 0x00;
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target_crc_value = CRC->DR;
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#endif
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target_crc_value = calcCRC32std(config_section_first_start, CRC_OFFSET - 4, 0x04C11DB7, 0xFFFFFFFF, 0, 0, 0);
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out = configuration_handler_program_crc(target_crc_value, 1);
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@ -572,7 +520,7 @@ uint32_t configuration_handler_restore_default_second(void) {
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// check if erasure was completed successfully
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if (flash_status == FLASH_COMPLETE) {
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for (config_struct_it = 0; config_struct_it < 5; config_struct_it++) {
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for (config_struct_it = 0; config_struct_it < STRUCT_COUNT; config_struct_it++) {
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// set pointers
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switch (config_struct_it) {
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@ -601,6 +549,13 @@ uint32_t configuration_handler_restore_default_second(void) {
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target = (void *) config_data_rtu_second_ptr;
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size = sizeof(config_data_umb_t);
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break;
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#ifdef PARAMETEO
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case 5:
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source = (void *) &config_data_gsm_default;
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target = (void *) config_data_gsm_first_ptr;
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size = sizeof(config_data_umb_t);
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break;
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#endif
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}
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// program data
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@ -627,31 +582,7 @@ uint32_t configuration_handler_restore_default_second(void) {
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// if second is OK it will be used instead (if its programming counter has value three or more).
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//*(uint16_t*)&config_data_pgm_cntr_second = 0x0002u;
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#ifdef STM32F10X_MD_VL
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// resetting CRC engine
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CRC_ResetDR();
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// calculate CRC checksum of the first block
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target_crc_value = CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
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// adding finalizing 0x00
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//target_crc_value = CRC_CalcCRC((uint32_t)0x0);
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#endif
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#ifdef STM32L471xx
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// reset CRC engine
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LL_CRC_ResetCRCCalculationUnit(CRC);
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for (int i = 0; i < CRC_32B_WORD_OFFSET - 1; i++) {
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// feed the data into CRC engine
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LL_CRC_FeedData32(CRC, *(config_section_second_start + i));
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}
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// placeholder for CRC value itself
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//CRC->DR = 0x00;
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target_crc_value = CRC->DR;
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#endif
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target_crc_value = calcCRC32std(config_section_second_start, CRC_OFFSET - 4, 0x04C11DB7, 0xFFFFFFFF, 0, 0, 0);
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out = configuration_handler_program_crc(target_crc_value, 2);
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