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Add high latency capture option in GPU mode (slightly faster but only suitable for 9/12bpp)

pull/256/head
IanSB 2021-11-23 01:19:16 +00:00
rodzic b246f19409
commit f36f1946ee
11 zmienionych plików z 853 dodań i 526 usunięć
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12
src/capture_line_default_twelvebits_8bpp_16bpp.S
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@ -31,7 +31,7 @@
capture_line_default_eightbits_8bpp:
push {lr}
SETUP_VSYNC_DEBUG_R11_R12
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_EIGHT_BITS_MASK_R14
loop_8bpp:
@ -76,7 +76,7 @@ capture_line_default_twelvebits_16bpp:
tst r3, #BITDUP_ENABLE_FFOSD | BITDUP_ENABLE_GREY_DETECT
bne TEST_capture_line_default_twelvebits_16bpp
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_TWELVE_BITS_MASK_R14
loop_16bpp:
@ -109,7 +109,7 @@ TEST_capture_line_default_twelvebits_16bpp:
tst r3, #BIT_OSD | BITDUP_ENABLE_GREY_DETECT
bne OSD_capture_line_default_twelvebits_16bpp
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_TWELVE_BITS_MASK_R14
TEST_loop_16bpp:
@ -141,7 +141,7 @@ TEST_loop_16bpp:
OSD_capture_line_default_twelvebits_16bpp:
tst r3, #BITDUP_ENABLE_GREY_DETECT
orrne r3, r3, #BITDUP_LINE_CONDITION_DETECTED
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_TWELVE_BITS_MASK_R14
OSD_loop_16bpp:
@ -182,7 +182,7 @@ preload_capture_line_default_twelvebits_16bpp:
capture_line_default_ninebitslo_16bpp:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_NINELO_BITS_MASK_R14
loop_9lobpp:
@ -224,7 +224,7 @@ preload_capture_line_default_ninebitslo_16bpp:
capture_line_default_ninebitshi_16bpp:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_NINEHI_BITS_MASK_R14
loop_9hibpp:

8
src/capture_line_default_twelvebits_double_8bpp_16bpp.S
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@ -31,7 +31,7 @@
capture_line_default_eightbits_double_8bpp:
push {lr}
SETUP_VSYNC_DEBUG_R11_R12_DOUBLE
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #2
SETUP_EIGHT_BITS_MASK_R14
loop_8bpp:
@ -76,7 +76,7 @@ preload_capture_line_default_eightbits_double_8bpp:
capture_line_default_twelvebits_double_16bpp:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #2
SETUP_TWELVE_BITS_MASK_R14
loop_16bpp:
@ -109,7 +109,7 @@ preload_capture_line_default_twelvebits_double_16bpp:
capture_line_default_ninebitslo_double_16bpp:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #2
SETUP_NINELO_BITS_MASK_R14
loop_16lobpp:
@ -142,7 +142,7 @@ preload_capture_line_default_ninebitslo_double_16bpp:
capture_line_default_ninebitshi_double_16bpp:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #2
SETUP_NINEHI_BITS_MASK_R14
loop_16hibpp:

12
src/capture_line_fast_twelvebits_8bpp_16bpp.S
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@ -32,7 +32,7 @@
capture_line_fast_eightbits_8bpp:
push {lr}
SETUP_VSYNC_DEBUG_R11_R12
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_EIGHT_BITS_MASK_R14
loop_8bpp:
@ -74,7 +74,7 @@ capture_line_fast_twelvebits_16bpp:
tst r3, #BITDUP_ENABLE_FFOSD | BITDUP_ENABLE_GREY_DETECT
bne TEST_capture_line_fast_twelvebits_16bpp
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_TWELVE_BITS_MASK_R14
loop_16bpp:
@ -106,7 +106,7 @@ TEST_capture_line_fast_twelvebits_16bpp:
tst r3, #BIT_OSD | BITDUP_ENABLE_GREY_DETECT
bne OSD_capture_line_fast_twelvebits_16bpp
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_TWELVE_BITS_MASK_R14
TEST_loop_16bpp:
@ -137,7 +137,7 @@ TEST_loop_16bpp:
OSD_capture_line_fast_twelvebits_16bpp:
tst r3, #BITDUP_ENABLE_GREY_DETECT
orrne r3, r3, #BITDUP_LINE_CONDITION_DETECTED
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_TWELVE_BITS_MASK_R14
OSD_loop_16bpp:
@ -177,7 +177,7 @@ preload_capture_line_fast_twelvebits_16bpp:
capture_line_fast_ninebitslo_16bpp:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_NINELO_BITS_MASK_R14
loop_16lobpp:
@ -217,7 +217,7 @@ preload_capture_line_fast_ninebitslo_16bpp:
capture_line_fast_ninebitshi_16bpp:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #3
SETUP_NINEHI_BITS_MASK_R14
loop_16hibpp:

6
src/capture_line_ntsc_8bpp.S
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@ -29,8 +29,7 @@ skip_psync_loop_no_oldL\@:
.macro SKIP_PSYNC_NO_OLD_CPLD_NTSC
SKIP_PSYNC_COMMON_NO_OLD_CPLD
add r8, r7, r1
add r8, r8, #1 + 4
mov r8, r8, lsr #1
add r8, r8, #4
str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
mov r9, #0
skip_psync_loop_no_oldL6\@:
@ -51,8 +50,7 @@ skip_psync_loop_no_oldL6\@:
.macro SKIP_PSYNC_NO_OLD_CPLD_NTSC_3BPP
SKIP_PSYNC_COMMON_NO_OLD_CPLD
add r8, r7, r1
add r8, r8, #1 + 2
mov r8, r8, lsr #1
add r8, r8, #2
str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
mov r9, #0
skip_psync_loop_no_oldL3\@:

6
src/defs.h
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@ -527,10 +527,10 @@ typedef struct {
#define SAMPLE_WIDTH_9HI 4
#define SAMPLE_WIDTH_12 5
#define MODE_SET1 0
#define MODE_SET2 1
#define SIMPLE_SYNC_FLAG 0x00008000
#define HIGH_LATENCY_FLAG 0x00004000
#endif

25
src/macros.S
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@ -205,6 +205,10 @@ skip_psync_loop_no_old\@:
bne skip_psync_loop_no_old\@
.endm
.macro SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
SKIP_PSYNC_NO_OLD_CPLD
.endm
.macro SKIP_PSYNC_COMMON
// called if 4 bits per pixel in non-fast mode so has support for old CPLV v1 & v2
WAIT_FOR_CSYNC_0_SKIP_HSYNC
@ -459,11 +463,21 @@ do_skip_psync_no_old\@:
//exit with timestamp in r14
.endm
.macro SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
SKIP_PSYNC_COMMON_NO_OLD_CPLD
add r8, r7, r1
orr r8, r8, #HIGH_LATENCY_FLAG //request high latency capture (slightly faster but only really suitable for 9/12bpp modes)
str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
skip_psync_no_old_loop\@:
WAIT_FOR_PSYNC_EDGE_FAST // wait for next edge of psync
subs r7, r7, #1
bne skip_psync_no_old_loop\@
push {r14} //save timestamp
.endm
.macro SKIP_PSYNC_NO_OLD_CPLD
SKIP_PSYNC_COMMON_NO_OLD_CPLD
add r8, r7, r1
add r8, r8, #1
mov r8, r8, lsr #1
str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
skip_psync_no_old_loop\@:
WAIT_FOR_PSYNC_EDGE_FAST // wait for next edge of psync
@ -483,13 +497,12 @@ skip_psync_no_old_loop\@:
add r7, r7, r8
bl _get_gpu_data_base_r4
add r8, r7, r1
add r8, r8, #1
mov r8, r8, lsr #1
ldr r9, =param_sync_edge
ldr r9, [r9]
tst r3, #BIT_NO_SKIP_HSYNC
orrne r8, r8, #0x00008000 //flag sync command
orrne r8, r9, lsl #16 //or in sync command
orrne r8, r8, #SIMPLE_SYNC_FLAG //flag sync command
orrne r8, r9, lsl #16 //or in sync command
orr r8, r8, #HIGH_LATENCY_FLAG //request high latency capture (slightly faster but only really suitable for 9/12bpp modes)
str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
beq skip_psync_simple_fast\@
wait_for_simple_sync\@:

2
src/rgb_to_fb.S
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@ -833,6 +833,8 @@ mod10:
GPU_workspace:
.word 0
.word 0
.word 0
.word 0
param_fb_pitch:
.word 0

BIN
src/videocore.asm
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Plik binarny nie jest wyświetlany.

108
src/videocore.c
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@ -6,51 +6,73 @@ unsigned char ___videocore_asm[] = {
0x13, 0x09, 0x12, 0x66, 0x02, 0x6a, 0xfd, 0x18, 0x04, 0x00, 0x5a, 0x00,
0x04, 0xe8, 0x34, 0x00, 0x20, 0x7e, 0x05, 0xe8, 0xa0, 0x00, 0x00, 0x7e,
0x06, 0xe8, 0xfc, 0x3f, 0x00, 0x00, 0x07, 0xe8, 0xff, 0x0f, 0x00, 0x00,
0x08, 0xe8, 0x01, 0x00, 0x02, 0x00, 0x02, 0x60, 0x52, 0x31, 0x52, 0x32,
0x52, 0x33, 0x52, 0x35, 0x52, 0x36, 0x52, 0x37, 0x52, 0x34, 0x52, 0x21,
0xf2, 0x71, 0x52, 0x31, 0x52, 0x22, 0xf2, 0x71, 0x52, 0x32, 0x52, 0x23,
0xf2, 0x71, 0x52, 0x33, 0x52, 0x25, 0xf2, 0x71, 0x52, 0x35, 0x52, 0x26,
0xf2, 0x71, 0x52, 0x36, 0x52, 0x27, 0xf2, 0x71, 0x52, 0x37, 0x02, 0x60,
0x52, 0x30, 0x52, 0x34, 0x82, 0x40, 0x53, 0x20, 0x03, 0x6a, 0x7e, 0x18,
0xf3, 0x6c, 0x00, 0x90, 0x64, 0x00, 0x31, 0x40, 0x01, 0x7b, 0x01, 0x6a,
0x39, 0x18, 0x11, 0x6a, 0x27, 0x18, 0x12, 0x73, 0x21, 0x6a, 0x34, 0x18,
0x31, 0x6a, 0x22, 0x18, 0x41, 0x6a, 0x0e, 0x18, 0x51, 0x6a, 0xd6, 0x18,
0x08, 0xe8, 0x01, 0x00, 0x02, 0x00, 0x0c, 0x60, 0x5c, 0x31, 0x5c, 0x32,
0x5c, 0x33, 0x5c, 0x35, 0x5c, 0x36, 0x5c, 0x37, 0x50, 0x21, 0x51, 0x22,
0x52, 0x23, 0x53, 0x25, 0x59, 0x26, 0x5a, 0x27, 0x5c, 0x30, 0x5c, 0x34,
0xf0, 0x71, 0xf1, 0x71, 0xf2, 0x71, 0xf3, 0x71, 0xf9, 0x71, 0xfa, 0x71,
0x50, 0x31, 0x51, 0x32, 0x52, 0x33, 0x53, 0x35, 0x59, 0x36, 0x5a, 0x37,
0x82, 0x40, 0x53, 0x20, 0x03, 0x6a, 0x7e, 0x18, 0xf3, 0x6c, 0x00, 0x90,
0x64, 0x00, 0x31, 0x40, 0x01, 0x7b, 0x01, 0x6a, 0x39, 0x18, 0x11, 0x6a,
0x27, 0x18, 0x12, 0x73, 0x21, 0x6a, 0x34, 0x18, 0x31, 0x6a, 0x22, 0x18,
0x41, 0x6a, 0x0e, 0x18, 0x51, 0x6a, 0xd7, 0x18, 0x40, 0x08, 0x20, 0x45,
0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf9, 0x18,
0x58, 0x34, 0x00, 0x9e, 0x41, 0x00, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf9, 0x18, 0x58, 0x34,
0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75,
0x70, 0x6d, 0xf9, 0x18, 0x58, 0x34, 0x00, 0x9e, 0x41, 0x00, 0x40, 0x08,
0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d,
0xf9, 0x18, 0x58, 0x34, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18,
0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0x79, 0x18, 0x2e, 0x1f, 0x40, 0x08,
0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x40, 0x08,
0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d,
0xf3, 0x18, 0x58, 0x34, 0x1e, 0x1f, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
0x70, 0x6d, 0x79, 0x18, 0x2e, 0x1f, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf3, 0x18, 0x58, 0x34,
0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75,
0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75,
0x70, 0x6d, 0x73, 0x18, 0x12, 0x6d, 0x87, 0x18, 0x40, 0x08, 0x20, 0x45,
0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x82, 0x40, 0x73, 0x47,
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2,
0xce, 0x00, 0x20, 0x4d, 0x13, 0x66, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d,
0x03, 0x6a, 0x50, 0x31, 0x7f, 0x90, 0x6d, 0xff, 0x40, 0x08, 0x10, 0x6d,
0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d,
0x13, 0x66, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47,
0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x03, 0x6a, 0x50, 0x32,
0x7f, 0x90, 0x57, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x13, 0x66, 0x41, 0x08,
0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
0x01, 0x7d, 0x10, 0x4d, 0x03, 0x6a, 0x50, 0x33, 0x7f, 0x90, 0x41, 0xff,
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2,
0xce, 0x00, 0x20, 0x4d, 0x13, 0x66, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d,
0x03, 0x6a, 0x50, 0x35, 0x7f, 0x90, 0x2b, 0xff, 0x40, 0x08, 0x10, 0x6d,
0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d,
0x13, 0x66, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47,
0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x03, 0x6a, 0x50, 0x36,
0x7f, 0x90, 0x15, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x13, 0x66, 0x12, 0x75,
0x1e, 0x1f, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45,
0x12, 0x75, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45,
0x12, 0x75, 0x70, 0x6d, 0xf3, 0x18, 0x58, 0x34, 0x40, 0x08, 0x20, 0x45,
0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x40, 0x08, 0x20, 0x45,
0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0x73, 0x18,
0x12, 0x6d, 0x87, 0x18, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18,
0x20, 0x45, 0x12, 0x75, 0x82, 0x40, 0xe3, 0x6c, 0x00, 0x91, 0x8c, 0x00,
0x73, 0x47, 0x13, 0x62, 0x13, 0x7a, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18,
0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d,
0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2,
0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x03, 0x6a, 0x50, 0x37, 0x7f, 0x90,
0xfe, 0xfe, 0x7f, 0x9e, 0x7b, 0xff
0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x31, 0x7f, 0x90,
0x69, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47,
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d,
0x03, 0x6a, 0x10, 0x4d, 0x50, 0x32, 0x7f, 0x90, 0x53, 0xff, 0x40, 0x08,
0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d,
0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d,
0x50, 0x33, 0x7f, 0x90, 0x3d, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18,
0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d,
0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2,
0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x35, 0x7f, 0x90,
0x27, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47,
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d,
0x03, 0x6a, 0x10, 0x4d, 0x50, 0x36, 0x7f, 0x90, 0x11, 0xff, 0x40, 0x08,
0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
0x13, 0x66, 0x20, 0x4d, 0x12, 0x75, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
0x10, 0x4d, 0x50, 0x37, 0x7f, 0x90, 0xfa, 0xfe, 0x7f, 0x9e, 0x7b, 0xff,
0x73, 0x47, 0x30, 0x40, 0xb0, 0x62, 0xc1, 0x60, 0xe3, 0xc4, 0x01, 0x07,
0x12, 0x75, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47,
0x00, 0xc2, 0xce, 0x00, 0x12, 0x75, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d,
0x10, 0x4d, 0x10, 0x4d, 0x50, 0x31, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18,
0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x41, 0x08,
0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d, 0x50, 0x32, 0x40, 0x08, 0x10, 0x6d,
0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66,
0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47,
0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d, 0x50, 0x33,
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2,
0xce, 0x00, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d,
0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d,
0x50, 0x35, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47,
0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d,
0x10, 0x4d, 0x50, 0x36, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d,
0x10, 0x4d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x37, 0x7f, 0x91, 0x8b, 0xff,
0x7f, 0x9e, 0x78, 0xfe
};
unsigned int ___videocore_asm_len = 630;
unsigned int ___videocore_asm_len = 892;

1116
src/videocore.lst
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Plik diff jest za duży Load Diff

84
src/videocore.s
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@ -63,6 +63,29 @@ wait_psync_hi\@:
or r0, r1
.endm
.macro LO_PSYNC_CAPTURE_HL
wait_psync_lo\@:
ld r0, (r4)
btst r0, PSYNC_BIT
bne wait_psync_lo\@
btst r0, MUX_BIT
and r0, r6
bsetne r0, ALT_MUX_BIT #move mux bit to position in 16 bit sample
.endm
.macro HI_PSYNC_CAPTURE_HL
wait_psync_hi\@:
ld r1, (r4)
btst r1, PSYNC_BIT
beq wait_psync_hi\@
btst r1, MUX_BIT
and r1, r6
bsetne r1, ALT_MUX_BIT #move mux bit to position in 16 bit sample
lsl r1, 16 #merge lo and hi samples
or r0, r1
.endm
.macro EDGE_DETECT
waitPSE\@:
ld r0, (r4)
@ -121,7 +144,7 @@ wait_for_command:
ld r2, DATA_BUFFER_2_offset(r5)
ld r3, DATA_BUFFER_3_offset(r5)
ld r9, DATA_BUFFER_4_offset(r5)
ld r10, DATA_BUFFER_5_offset(r5)
ld r10, DATA_BUFFER_5_offset(r5)
st r12, GPU_COMMAND_offset(r5) #set command register to 0
st r12, GPU_SYNC_offset(r5) #set sync register to 0
bset r0, FINAL_BIT
@ -218,7 +241,12 @@ no_compensate_psync:
mov r2, r8 #set the default state of the control bits
do_capture:
btst r3, 14 #bit signals high latency capture, only suitable for 9/12bpp modes
bne do_high_latency_capture
and r3, r7 #mask off any command bits (max capture is 4095 psync cycles)
add r3, 1 #round up to multiple of 2
lsr r3, 1 #divide by 2 as capturing 2 samples per cycle
capture_loop:
LO_PSYNC_CAPTURE
@ -259,3 +287,57 @@ capture_loop:
beq wait_for_command
b capture_loop
do_high_latency_capture:
and r3, r7 #mask off any command bits (max capture is 4095 psync cycles)
mov r0, r3
add r0, 11 #round up to multiple of 12
mov r1, 12
divu r3, r0, r1 #divide by 12 as capturing 12 samples per cycle
bchg r2, PSYNC_BIT #pre invert the software psync bit
high_latency_capture_loop:
LO_PSYNC_CAPTURE_HL
bchg r2, PSYNC_BIT #invert the software psync bit every 12 samples / 6 words
or r0, r2 #merge bit state
HI_PSYNC_CAPTURE_HL
or r0, r1
st r0, DATA_BUFFER_0_offset(r5)
LO_PSYNC_CAPTURE_HL
or r0, r2 #merge bit state
HI_PSYNC_CAPTURE_HL
or r0, r1
st r0, DATA_BUFFER_1_offset(r5)
LO_PSYNC_CAPTURE_HL
sub r3, 1
or r0, r2 #merge bit state
HI_PSYNC_CAPTURE_HL
or r0, r1
st r0, DATA_BUFFER_2_offset(r5)
LO_PSYNC_CAPTURE_HL
or r0, r2 #merge bit state
HI_PSYNC_CAPTURE_HL
or r0, r1
st r0, DATA_BUFFER_3_offset(r5)
LO_PSYNC_CAPTURE_HL
or r0, r2 #merge bit state
HI_PSYNC_CAPTURE_HL
or r0, r1
st r0, DATA_BUFFER_4_offset(r5)
LO_PSYNC_CAPTURE_HL
or r0, r2 #merge bit state
HI_PSYNC_CAPTURE_HL
cmp r3, 0
or r0, r1
st r0, DATA_BUFFER_5_offset(r5)
bne high_latency_capture_loop
b wait_for_command