From c2cea0c45b8246e49e811358af64d8a5e32d7c6f Mon Sep 17 00:00:00 2001 From: IanSB Date: Tue, 24 Nov 2020 00:12:55 +0000 Subject: [PATCH] Update BBC vhdl to v7.9 & v6.8 --- vhdl/RGBtoHDMI.vhdl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/vhdl/RGBtoHDMI.vhdl b/vhdl/RGBtoHDMI.vhdl index 54a20203..40f9e189 100644 --- a/vhdl/RGBtoHDMI.vhdl +++ b/vhdl/RGBtoHDMI.vhdl @@ -62,9 +62,9 @@ architecture Behavorial of RGBtoHDMI is -- 4 = RGB CPLD (TTL) -- C = RGB CPLD (Analog) - constant VERSION_NUM_BBC : std_logic_vector(11 downto 0) := x"067"; - constant VERSION_NUM_RGB_TTL : std_logic_vector(11 downto 0) := x"478"; - constant VERSION_NUM_RGB_ANALOG : std_logic_vector(11 downto 0) := x"C78"; + constant VERSION_NUM_BBC : std_logic_vector(11 downto 0) := x"068"; + constant VERSION_NUM_RGB_TTL : std_logic_vector(11 downto 0) := x"479"; + constant VERSION_NUM_RGB_ANALOG : std_logic_vector(11 downto 0) := x"C79"; signal shift_R : std_logic_vector(3 downto 0); signal shift_G : std_logic_vector(3 downto 0); @@ -318,7 +318,7 @@ begin (rate = "00" and sp_data = '1' and counter(2 downto 0) = 0) or -- 9bpp (rate = "01" and sp_data = '1' and counter(2 downto 0) = 0) or -- 12bpp (rate = "10" and sp_data = '0' and counter(5 downto 0) = 0) or -- subsample even 3bpp - (rate = "11" and sp_data = '0' and counter(5 downto 0) = 32) or -- subsample odd 3bpp + (rate = "11" and sp_data = '0' and counter(5 downto 0) = 8) or -- subsample odd 3bpp (rate = "10" and sp_data = '1' and counter(3 downto 0) = 0) or -- subsample even 12bpp (rate = "11" and sp_data = '1' and counter(3 downto 0) = 8)) then -- subsample odd 12bpp -- toggle is asserted in cycle 1