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Change C code to use variable peripheral base

pull/256/head
IanSB 2021-11-21 04:36:23 +00:00
rodzic 9733f11a65
commit c295151e7c
20 zmienionych plików z 107 dodań i 55 usunięć
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4
src/arm-exception.c
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@ -10,8 +10,8 @@ void reboot_now(void)
{
const int PM_PASSWORD = 0x5a000000;
const int PM_RSTC_WRCFG_FULL_RESET = 0x00000020;
unsigned int *PM_WDOG = (unsigned int *) (PERIPHERAL_BASE + 0x00100024);
unsigned int *PM_RSTC = (unsigned int *) (PERIPHERAL_BASE + 0x0010001c);
unsigned int *PM_WDOG = (unsigned int *) (_get_peripheral_base() + 0x00100024);
unsigned int *PM_RSTC = (unsigned int *) (_get_peripheral_base() + 0x0010001c);
// timeout = 1/16th of a second? (whatever)
*PM_WDOG = PM_PASSWORD | 1;

18
src/armc-start.S
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@ -74,7 +74,7 @@
.global _data_memory_barrier
.global _get_hardware_id
.global _get_peripheral_base
#ifdef HAS_MULTICORE
.global _get_core
@ -262,6 +262,7 @@ _reset_continue:
b _cstartup
.ltorg
_read_hardware_id:
mrc p15,0,r5,c0,c0,0
bic r5, r5, #0xff000000
@ -272,24 +273,39 @@ _read_hardware_id:
ldr r2, =0x0000C070 //0x410FC075 pi 2
ldr r3, =0x0000D030 //0x410FD034 pi zero 2W or 3
ldr r4, =0x0000D080 //0x410FD083 pi 4
ldr r6, =_PERIPHERAL_BASE_RPI
ldr r7, =_PERIPHERAL_BASE_RPI3 //also RPI2
ldr r8, =_PERIPHERAL_BASE_RPI4
cmp r1, r5
moveq r0, #1
cmp r2, r5
moveq r0, #2
moveq r6, r7
cmp r3, r5
moveq r0, #3
moveq r6, r7
cmp r4, r5
moveq r0, #4
moveq r6, r8
str r0, hardware_id
str r6, peripheral_base
mov pc, lr
_get_hardware_id:
ldr r0, hardware_id
mov pc, r14
_get_peripheral_base:
ldr r0, peripheral_base
mov pc, r14
hardware_id:
.word 0
peripheral_base:
.word 0
.ltorg
.section ".text._get_stack_pointer"
_get_stack_pointer:

6
src/cache.c
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@ -14,7 +14,6 @@
const static unsigned l1_cached_threshold = L2_CACHED_MEM_BASE >> 20;
const static unsigned l2_cached_threshold = UNCACHED_MEM_BASE >> 20;
const static unsigned uncached_threshold = PERIPHERAL_BASE >> 20;
volatile __attribute__ ((aligned (0x4000))) unsigned int PageTable[4096];
volatile __attribute__ ((aligned (0x4000))) unsigned int PageTable2[NUM_4K_PAGES];
@ -226,7 +225,7 @@ void enable_MMU_and_IDCaches(int cached_screen_area, int cached_screen_size)
{
PageTable[base] = base << 20 | 0x04C02 | (shareable << 16) | (bb << 12);
}
for (; base < uncached_threshold; base++)
for (; base < (_get_peripheral_base() >> 20); base++)
{
PageTable[base] = base << 20 | 0x01C02;
}
@ -316,7 +315,8 @@ void enable_MMU_and_IDCaches(int cached_screen_area, int cached_screen_size)
// Invalidate entire data cache
#if defined(RPI2) || defined(RPI3) || defined(RPI4)
asm volatile ("isb" ::: "memory");
// asm volatile ("isb" ::: "memory");
asm volatile (".word 0xf57ff06f" ::: "memory");
InvalidateDataCache();
#else
// invalidate data cache and flush prefetch buffer

42
src/defs.h
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@ -8,6 +8,10 @@
#define _RPI3 3
#define _RPI4 4
#define _PERIPHERAL_BASE_RPI 0x20000000
#define _PERIPHERAL_BASE_RPI3 0x3F000000 //also RPI2
#define _PERIPHERAL_BASE_RPI4 0xFE000000
// Define how the Pi Framebuffer is initialized
// - if defined, use the property interface (Channel 8)
// - if not defined, use to the the framebuffer interface (Channel 1)
@ -449,20 +453,20 @@ typedef struct {
#define SCALER_BASE (volatile uint32_t *)(PERIPHERAL_BASE + 0x400000)
#if defined(RPI4)
#define PIXELVALVE2_HORZA (volatile uint32_t *)(PERIPHERAL_BASE + 0x20a00c)
#define PIXELVALVE2_HORZB (volatile uint32_t *)(PERIPHERAL_BASE + 0x20a010)
#define PIXELVALVE2_VERTA (volatile uint32_t *)(PERIPHERAL_BASE + 0x20a014)
#define PIXELVALVE2_VERTB (volatile uint32_t *)(PERIPHERAL_BASE + 0x20a018)
#define EMMC_LEGACY (volatile uint32_t *)(PERIPHERAL_BASE + 0x2000d0)
#define PIXELVALVE2_HORZA (volatile uint32_t *)(_get_peripheral_base() + 0x20a00c)
#define PIXELVALVE2_HORZB (volatile uint32_t *)(_get_peripheral_base() + 0x20a010)
#define PIXELVALVE2_VERTA (volatile uint32_t *)(_get_peripheral_base() + 0x20a014)
#define PIXELVALVE2_VERTB (volatile uint32_t *)(_get_peripheral_base() + 0x20a018)
#define EMMC_LEGACY (volatile uint32_t *)(_get_peripheral_base() + 0x2000d0)
#else
#define PIXELVALVE2_HORZA (volatile uint32_t *)(PERIPHERAL_BASE + 0x80700c)
#define PIXELVALVE2_HORZB (volatile uint32_t *)(PERIPHERAL_BASE + 0x807010)
#define PIXELVALVE2_VERTA (volatile uint32_t *)(PERIPHERAL_BASE + 0x807014)
#define PIXELVALVE2_VERTB (volatile uint32_t *)(PERIPHERAL_BASE + 0x807018)
#define PIXELVALVE2_HORZA (volatile uint32_t *)(_get_peripheral_base() + 0x80700c)
#define PIXELVALVE2_HORZB (volatile uint32_t *)(_get_peripheral_base() + 0x807010)
#define PIXELVALVE2_VERTA (volatile uint32_t *)(_get_peripheral_base() + 0x807014)
#define PIXELVALVE2_VERTB (volatile uint32_t *)(_get_peripheral_base() + 0x807018)
#endif
#define PM_RSTC (volatile uint32_t *)(PERIPHERAL_BASE + 0x10001c)
#define PM_WDOG (volatile uint32_t *)(PERIPHERAL_BASE + 0x100024)
#define PM_RSTC (volatile uint32_t *)(_get_peripheral_base() + 0x10001c)
#define PM_WDOG (volatile uint32_t *)(_get_peripheral_base() + 0x100024)
#define PM_PASSWORD 0x5a000000
#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
@ -474,15 +478,15 @@ typedef struct {
#define A2W_PLL_CHANNEL_DISABLE (1 << 8)
#define GZ_CLK_BUSY (1 << 7)
#define GZ_CLK_ENA (1 << 4)
#define GP_CLK1_CTL (volatile uint32_t *)(PERIPHERAL_BASE + 0x101078)
#define GP_CLK1_DIV (volatile uint32_t *)(PERIPHERAL_BASE + 0x10107C)
#define CM_PLLA (volatile uint32_t *)(PERIPHERAL_BASE + 0x101104)
#define CM_PLLC (volatile uint32_t *)(PERIPHERAL_BASE + 0x101124)
#define CM_PLLD (volatile uint32_t *)(PERIPHERAL_BASE + 0x101144)
#define CM_BASE (volatile uint32_t *)(PERIPHERAL_BASE + 0x101000)
#define GP_CLK1_CTL (volatile uint32_t *)(_get_peripheral_base() + 0x101078)
#define GP_CLK1_DIV (volatile uint32_t *)(_get_peripheral_base() + 0x10107C)
#define CM_PLLA (volatile uint32_t *)(_get_peripheral_base() + 0x101104)
#define CM_PLLC (volatile uint32_t *)(_get_peripheral_base() + 0x101124)
#define CM_PLLD (volatile uint32_t *)(_get_peripheral_base() + 0x101144)
#define CM_BASE (volatile uint32_t *)(_get_peripheral_base() + 0x101000)
#define SCALER_DISPLIST1 (volatile uint32_t *)(PERIPHERAL_BASE + 0x400024)
#define SCALER_DISPLAY_LIST (volatile uint32_t *)(PERIPHERAL_BASE + 0x402000)
#define SCALER_DISPLIST1 (volatile uint32_t *)(_get_peripheral_base() + 0x400024)
#define SCALER_DISPLAY_LIST (volatile uint32_t *)(_get_peripheral_base() + 0x402000)
#define PIXEL_FORMAT 1 // RGBA4444
#define PIXEL_ORDER 3 // ABGR

1
src/geometry.c
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@ -5,6 +5,7 @@
#include "defs.h"
#include "logging.h"
#include "rgb_to_hdmi.h"
#include "startup.h"
static const char *px_sampling_names[] = {
"Normal",

15
src/macros.S
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@ -1336,14 +1336,21 @@ skip_psync_loop_simple_fast_loop\@:
#if defined(RPI2) || defined(RPI3) || defined(RPI4)
//
// Data Synchronisation Barrier
.macro _DSB
dsb
.endm
// Data Memory Barrier
.macro _DMB
dmb
.endm
#else
// Data Synchronisation Barrier
.macro DSB
.macro _DSB
mcr p15, 0, r0, c7, c10, 4
.endm
// Data Memory Barrier
.macro DMB
.macro _DMB
mcr p15, 0, r0, c7, c10, 5
.endm
#endif
@ -1364,7 +1371,7 @@ skip_psync_loop_simple_fast_loop\@:
mov r10, #0
str r10, [r0]
// Don't proceed until this write is complete
DSB
_DSB
.endm
.macro SHOW_VSYNC

3
src/osd.c
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@ -1534,9 +1534,10 @@ static const char *get_param_string(param_menu_item_t *param_item) {
return number;
}
static volatile uint32_t *gpioreg = (volatile uint32_t *)(PERIPHERAL_BASE + 0x101000UL);
static volatile uint32_t *gpioreg;
void osd_display_interface(int line) {
gpioreg = (volatile uint32_t *)(_get_peripheral_base() + 0x101000UL);
char osdline[256];
sprintf(osdline, "Interface: %s", get_interface_name());
osd_set(line, 0, osdline);

11
src/rgb_to_hdmi.c
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@ -288,7 +288,7 @@ static int resolution_status = 0;
static volatile uint32_t display_list_index = 0;
#ifndef RPI4
static volatile uint32_t* display_list = SCALER_DISPLAY_LIST;
volatile uint32_t* display_list;
#endif
#ifndef USE_ARM_CAPTURE
@ -337,7 +337,7 @@ static const char *mixed_names[] = {
"Mixed H & V CPLD"
};
// Calculated so that the constants from librpitx work
static volatile uint32_t *gpioreg = (volatile uint32_t *)(PERIPHERAL_BASE + 0x101000UL);
static volatile uint32_t *gpioreg;
// Temporary buffer that must be at least as large as a frame buffer
static unsigned char last[4096 * 1024] __attribute__((aligned(32)));
@ -2421,7 +2421,7 @@ void swapBuffer(int buffer) {
#ifndef RPI4
if (capinfo->bpp == 16) {
// directly manipulate the display list in 16BPP mode otherwise display list gets reconstructed
int dli = ((int)capinfo->fb | 0xc0000000) + (buffer * capinfo->height * capinfo->pitch);
int dli = ((int)capinfo->fb | 0xc0000000) + (buffer * capinfo->height * capinfo->pitch);
do {
display_list[display_list_index + 5] = dli;
} while (dli != display_list[display_list_index + 5]);
@ -3177,7 +3177,7 @@ void rgb_to_hdmi_main() {
log_info("Setting up frame buffer");
init_framebuffer(capinfo);
log_info("Done setting up frame buffer");
//log_info("Peripheral base = %08X", PERIPHERAL_BASE);
//log_info("Peripheral base = %08X", _get_peripheral_base());
/*
static volatile uint32_t* xdisplay_list = GPU_ARM_DBELLDATAC;
@ -3594,7 +3594,8 @@ void kernel_main(unsigned int r0, unsigned int r1, unsigned int atags)
log_info("No framebuffer area marked as cached");
}
log_info("Pi Hardware detected as type %d", _get_hardware_id());
display_list = SCALER_DISPLAY_LIST;
gpioreg = (volatile uint32_t *)(_get_peripheral_base() + 0x101000UL);
init_hardware();
#ifdef HAS_MULTICORE

8
src/rpi-aux.c
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@ -15,10 +15,11 @@
#define TX_BUFFER_SIZE 65536 // Must be a power of 2
static aux_t* auxillary = (aux_t*) AUX_BASE;
static aux_t* auxillary;
aux_t* RPI_GetAux(void)
{
auxillary = (aux_t*) AUX_BASE;
return auxillary;
}
@ -34,7 +35,7 @@ static volatile int tx_head;
static volatile int tx_tail;
static void __attribute__((interrupt("IRQ"))) RPI_AuxMiniUartIRQHandler() {
auxillary = (aux_t*) AUX_BASE;
while (1) {
int iir = auxillary->MU_IIR;
@ -68,6 +69,7 @@ static void __attribute__((interrupt("IRQ"))) RPI_AuxMiniUartIRQHandler() {
void RPI_AuxMiniUartInit_With_Freq(int baud, int bits, int sys_freq)
{
auxillary = (aux_t*) AUX_BASE;
volatile int i;
/* As this is a mini uart the configuration is complete! Now just
@ -138,6 +140,7 @@ void RPI_AuxMiniUartInit(int baud, int bits)
void RPI_AuxMiniUartWrite(char c)
{
auxillary = (aux_t*) AUX_BASE;
#ifdef USE_IRQ
int tmp_head = (tx_head + 1) & (TX_BUFFER_SIZE - 1);
@ -170,6 +173,7 @@ void RPI_AuxMiniUartWrite(char c)
}
void RPI_AuxMiniUartFlush() {
auxillary = (aux_t*) AUX_BASE;
#ifdef USE_IRQ
while (tx_tail != tx_head); // Currently untested!
#else

2
src/rpi-aux.h
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@ -39,7 +39,7 @@
the elinux BCM2835 datasheet errata:
http://elinux.org/BCM2835_datasheet_errata */
#define AUX_BASE ( PERIPHERAL_BASE + 0x215000 )
#define AUX_BASE ( _get_peripheral_base() + 0x215000 )
#define AUX_ENA_MINIUART ( 1 << 0 )
#define AUX_ENA_SPI1 ( 1 << 1 )

8
src/rpi-gpio.c
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@ -5,10 +5,11 @@
#include "rgb_to_hdmi.h"
#include "logging.h"
rpi_gpio_t* RPI_GpioBase = (rpi_gpio_t*) RPI_GPIO_BASE;
rpi_gpio_t* RPI_GpioBase;
void RPI_SetGpioPinFunction(rpi_gpio_pin_t gpio, rpi_gpio_alt_function_t func)
{
RPI_GpioBase = (rpi_gpio_t*) RPI_GPIO_BASE;
rpi_reg_rw_t* fsel_reg = &RPI_GpioBase->GPFSEL[gpio / 10];
rpi_reg_rw_t fsel_copy = *fsel_reg;
@ -30,7 +31,7 @@ void RPI_SetGpioInput(rpi_gpio_pin_t gpio)
rpi_gpio_value_t RPI_GetGpioValue(rpi_gpio_pin_t gpio)
{
uint32_t result;
RPI_GpioBase = (rpi_gpio_t*) RPI_GPIO_BASE;
switch (gpio / 32)
{
case 0:
@ -63,6 +64,7 @@ void RPI_ToggleGpio(rpi_gpio_pin_t gpio)
void RPI_SetGpioHi(rpi_gpio_pin_t gpio)
{
RPI_GpioBase = (rpi_gpio_t*) RPI_GPIO_BASE;
switch (gpio / 32)
{
case 0:
@ -80,6 +82,7 @@ void RPI_SetGpioHi(rpi_gpio_pin_t gpio)
void RPI_SetGpioLo(rpi_gpio_pin_t gpio)
{
RPI_GpioBase = (rpi_gpio_t*) RPI_GPIO_BASE;
switch (gpio / 32)
{
case 0:
@ -104,6 +107,7 @@ void RPI_SetGpioValue(rpi_gpio_pin_t gpio, rpi_gpio_value_t value)
}
void RPI_SetGpioPullUpDown(uint32_t gpio_pins, uint32_t pull_type) {
RPI_GpioBase = (rpi_gpio_t*) RPI_GPIO_BASE;
//log_info("Pull Type: %08X, %02X", gpio_pins, pull_type);
RPI_GpioBase->GPPUD = pull_type;
delay_in_arm_cycles_cpu_adjust(5000);

6
src/rpi-gpio.h
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@ -1,4 +1,4 @@
/*
/*
Part of the Raspberry-Pi Bare Metal Tutorials
Copyright (c) 2013-2015, Brian Sidebotham
All rights reserved.
@ -30,9 +30,11 @@
#define RPI_GPIO_H
#include "rpi-base.h"
#include "startup.h"
/** The base address of the GPIO peripheral (ARM Physical Address) */
#define RPI_GPIO_BASE (PERIPHERAL_BASE + 0x200000UL)
#define RPI_GPIO_BASE (_get_peripheral_base() + 0x200000UL)
// Raspberry Pi3 has a differentway of controlling the LED

5
src/rpi-interrupts.c
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@ -2,21 +2,20 @@
#include <stdint.h>
#include <stdbool.h>
#include "startup.h"
#include "rpi-base.h"
#include "rpi-gpio.h"
#include "rpi-interrupts.h"
/** @brief The BCM2835/6 Interupt controller peripheral at it's base address */
static rpi_irq_controller_t* rpiIRQController =
(rpi_irq_controller_t*)RPI_INTERRUPT_CONTROLLER_BASE;
static rpi_irq_controller_t* rpiIRQController;
/**
@brief Return the IRQ Controller register set
*/
rpi_irq_controller_t* RPI_GetIrqController( void )
{
rpiIRQController = (rpi_irq_controller_t*)RPI_INTERRUPT_CONTROLLER_BASE;
return rpiIRQController;
}

3
src/rpi-interrupts.h
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@ -34,12 +34,13 @@
#include <stdint.h>
#include "rpi-base.h"
#include "startup.h"
/** @brief See Section 7.5 of the BCM2836 ARM Peripherals documentation, the base
address of the controller is actually xxxxB000, but there is a 0x200 offset
to the first addressable register for the interrupt controller, so offset the
base to the first register */
#define RPI_INTERRUPT_CONTROLLER_BASE ( PERIPHERAL_BASE + 0xB200 )
#define RPI_INTERRUPT_CONTROLLER_BASE ( _get_peripheral_base() + 0xB200 )
/** @brief Bits in the Enable_Basic_IRQs register to enable various interrupts.
See the BCM2835 ARM Peripherals manual, section 7.5 */

6
src/rpi-mailbox.c
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@ -3,11 +3,13 @@
#include "rpi-gpio.h"
#include "rpi-mailbox.h"
/* Mailbox 0 mapped to it's base address */
static mailbox_t* rpiMailbox0 = (mailbox_t*)RPI_MAILBOX0_BASE;
static mailbox_t* rpiMailbox0;
void RPI_Mailbox0Write( mailbox0_channel_t channel, int value )
{
rpiMailbox0 = (mailbox_t*)RPI_MAILBOX0_BASE;
/* For information about accessing mailboxes, see:
https://github.com/raspberrypi/firmware/wiki/Accessing-mailboxes */
@ -26,6 +28,7 @@ void RPI_Mailbox0Write( mailbox0_channel_t channel, int value )
int RPI_Mailbox0Read( mailbox0_channel_t channel )
{
rpiMailbox0 = (mailbox_t*)RPI_MAILBOX0_BASE;
/* For information about accessing mailboxes, see:
https://github.com/raspberrypi/firmware/wiki/Accessing-mailboxes */
int value = -1;
@ -48,6 +51,7 @@ int RPI_Mailbox0Read( mailbox0_channel_t channel )
int RPI_Mailbox0Flush( mailbox0_channel_t channel )
{
rpiMailbox0 = (mailbox_t*)RPI_MAILBOX0_BASE;
int value = -1;
while( !(rpiMailbox0->Status & ARM_MS_EMPTY) ) {

3
src/rpi-mailbox.h
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@ -2,8 +2,9 @@
#define RPI_MAILBOX_H
#include "rpi-base.h"
#include "startup.h"
#define RPI_MAILBOX0_BASE ( PERIPHERAL_BASE + 0xB880 )
#define RPI_MAILBOX0_BASE ( _get_peripheral_base() + 0xB880 )
/* The available mailbox channels in the BCM2835 Mailbox interface.
See https://github.com/raspberrypi/firmware/wiki/Mailboxes for

5
src/rpi-systimer.c
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@ -1,15 +1,18 @@
#include <stdint.h>
#include "rpi-systimer.h"
#include "startup.h"
static rpi_sys_timer_t* rpiSystemTimer = (rpi_sys_timer_t*)RPI_SYSTIMER_BASE;
static rpi_sys_timer_t* rpiSystemTimer;
rpi_sys_timer_t* RPI_GetSystemTimer(void)
{
rpiSystemTimer = (rpi_sys_timer_t*)RPI_SYSTIMER_BASE;
return rpiSystemTimer;
}
void RPI_WaitMicroSeconds( uint32_t us )
{
rpiSystemTimer = (rpi_sys_timer_t*)RPI_SYSTIMER_BASE;
uint32_t ts = rpiSystemTimer->counter_lo;
while ( ( rpiSystemTimer->counter_lo - ts ) < us )

2
src/rpi-systimer.h
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@ -34,7 +34,7 @@
#include "rpi-base.h"
#define RPI_SYSTIMER_BASE ( PERIPHERAL_BASE + 0x3000 )
#define RPI_SYSTIMER_BASE ( _get_peripheral_base() + 0x3000 )
typedef struct {

2
src/startup.h
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@ -49,4 +49,6 @@ extern void _spin_core();
extern unsigned int _get_hardware_id();
extern unsigned int _get_peripheral_base();
#endif

12
src/toolchain-arm-none-eabi-rpi3.cmake
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@ -76,12 +76,14 @@ set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfloat-abi=hard" )
#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=crypto-neon-fp-armv8" )
#current flags for pi2 & pi3
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv7-a" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=neon-vfpv4" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv6zk" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mtune=arm1176jzf-s" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=vfp" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
set( CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
set( CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS} -march=armv8-a" )
set( CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS} -mfpu=crypto-neon-fp-armv8" )
set( CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS}" CACHE STRING "" )
# Add the raspberry-pi 3 definition so conditional compilation works
add_definitions( -DRPI3=1 )