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Pi Firmware: Optimizations towards getting 640x480 VGA working (manual merge from Ian) 

Change-Id: Ic2f8617a01337a7e7b1e97106eb9e2231d1eddce
cpld_v5
David Banks 2019-03-14 19:16:00 +00:00
rodzic 97c4b5fe21
commit 0a9b31ffb9
2 zmienionych plików z 43 dodań i 11 usunięć
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27
src/capture_line_sixbits_4bpp_8bpp.S
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@ -29,15 +29,15 @@ capture_line_sixbits_4bpp:
tst r3, #BIT_DEBUG
eorne r6, r6, #0x50 //magenta in leftmost
eorne r6, r6, #0x02000000 //green in rightmost
SKIP_PSYNC
SKIP_PSYNC_FAST
loop:
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_0_BITS_WIDE // input in r8, result in r10, corrupts r9
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_1_BITS_WIDE // input in r8, result in r10, corrupts r9
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_2_BITS_WIDE // input in r8, result in r10, corrupts r9
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_3_BITS_WIDE // input in r8, result in r10, corrupts r9
WRITE_WORD_FAST
subs r1, r1, #1
@ -64,14 +64,21 @@ capture_line_sixbits_8bpp:
tst r3, #BIT_DEBUG
eorne r5, r5, #0x05 //magenta in leftmost
eorne r6, r6, #0x02000000 //green in rightmost
mov r1, r1, lsl #1
SKIP_PSYNC
//mov r1, r1, lsl #1
SKIP_PSYNC_FAST
loop_8bpp:
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_LOW_BITS_8BPP_WIDE // input in r8, result in r10, corrupts r9
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_HIGH_BITS_8BPP_WIDE // input in r8, result in r10, corrupts r9
WRITE_WORD_FAST
mov r7, r10
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_LOW_BITS_8BPP_WIDE // input in r8, result in r10, corrupts r9
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_HIGH_BITS_8BPP_WIDE // input in r8, result in r10, corrupts r9
mov r9, r7
// stmia r0!, {r7, r10}
WRITE_WORDS_8BPP_FAST
subs r1, r1, #1
bne loop_8bpp
pop {pc}

27
src/macros.S
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@ -19,7 +19,20 @@ wait\@:
bne wait\@
// toggle the polarity to look for the opposite edge next time
eor r8, r3 // restore r8 value
eor r3, #PSYNC_MASK
.endm
.macro WAIT_FOR_PSYNC_EDGE_FAST
waitPF\@:
// Read the GPLEV0
ldr r8, [r4]
eor r8, r3
tst r8, #PSYNC_MASK
bne waitPF\@
// toggle the polarity to look for the opposite edge next time
eor r8, r3 // restore r8 value
eor r3, #PSYNC_MASK
.endm
@ -31,7 +44,8 @@ wait\@:
WAIT_FOR_CSYNC_1
READ_CYCLE_COUNTER r9
// Calculate length of low hsync pulse (in ARM cycles = ns)
sub r10, r9, r10
subs r10, r9, r10
rsbmi r10, r10, #0
// Start with the configured horizontal offset
// Implement half character horizontal scrolling:
// - a "short" hsync is 3.5us, leave h_offset as-is
@ -54,6 +68,17 @@ skip_psync_loop\@:
skip_psync_loop_exit\@:
.endm
.macro SKIP_PSYNC_FAST
// Wait for the start of hsync
WAIT_FOR_CSYNC_0
// Wait for the end of hsync
WAIT_FOR_CSYNC_1
skip_psync_loop_fast\@:
WAIT_FOR_PSYNC_EDGE_FAST // wait for next edge of psync
subs r7, r7, #1
bne skip_psync_loop_fast\@
.endm
.macro CAPTURE_0_BITS_WIDE
// Pixel 0 in GPIO 7.. 2 -> 7.. 4
// Pixel 1 in GPIO 13.. 8 -> 3.. 0