kopia lustrzana https://github.com/ArcticSaturn/RFM02
ArcticSaturn
rodzic
8f01c9df53
commit
45c8415a7d
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#include "RFM02.h"
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uint8_t _pinFSK;
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uint8_t _pinNIRQ;
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uint8_t _pinSOMI;
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uint8_t _pinSIMO;
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uint8_t _pinChipSelect;
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uint8_t _pinSerialClock;
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// Booster Pack Pins FR5969
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// 7 - P2.2 for SPI_CLK mode
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// 15 - P1.6 for SPI_SIMO mode
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// 14 - P1.7 for SPI_SOMI mode
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// 5 - P2.5 output pin for SPI_CS
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// 18 - P3.0 nIRQ for sending data
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// 3 - P2.6 as FSK input data
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// Set display's VCC and DISP pins to high
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static const uint8_t P_CS = 4;
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static const uint8_t P_FSK = 3;
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static const uint8_t P_NIRQ = 18;
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// empty constructor
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RFM02::RFM02() {
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RFM02(P_CS, P_FSK, P_NIRQ);
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}
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// constructor with variables
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RFM02::RFM02(uint8_t pinChipSelect, uint8_t pinFSK, uint8_t pinNIRQ){
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_pinChipSelect = pinChipSelect;
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_pinFSK = pinFSK;
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_pinNIRQ = pinNIRQ;
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}
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/*
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RFM02::RFM02(uint8_t deviceAddress) {
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RFM02(deviceAddress, CHANNEL);
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}
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RFM02::RFM02(uint8_t deviceAddress, uint8_t channel) {
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_deviceAddress = deviceAddress;
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_channel = channel;
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_gdo0 = GDO0;
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}
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*/
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void RFM02::begin() {
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digitalWrite(_pinChipSelect, HIGH);
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pinMode(_pinChipSelect, OUTPUT);
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digitalWrite(_pinFSK, HIGH);
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pinMode(_pinFSK, OUTPUT);
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pinMode(P_NIRQ, INPUT);
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pinMode(26, OUTPUT);
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digitalWrite(26, HIGH);
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delay(2000);
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digitalWrite(26, LOW);
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//digitalWrite(SS,HIGH);
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//pinMode(SS,OUTPUT);
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//resetDevice();
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configureDeviceSettings();
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//execStrobeCommand(RFM02_CMD_SRX);
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}
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void RFM02::writeRegister(uint8_t HighByte, uint8_t LowByte) {
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digitalWrite(_pinChipSelect,LOW);
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SPI.transfer(HighByte);
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SPI.transfer(LowByte);
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digitalWrite(_pinChipSelect,HIGH);
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}
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void RFM02::configureDeviceSettings() {
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//digitalWrite(_pinChipSelect,LOW);
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writeRegister(0xCC,0x00); // read status
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writeRegister(0x90,0x8A); // 868MHz Band +/- 90kHz Bandbreite
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writeRegister(0xA6,0x86); // 868 MHz
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writeRegister(0xD0,0x40); // RATE/2
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writeRegister(0xC8,0x23); // 4.8kbps
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writeRegister(0xC2,0x20); // Bit Sync active
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writeRegister(0xB0,0x00); // 0dBm output power
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writeRegister(0xC0,0x01); // disable TX
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//digitalWrite(_pinChipSelect,HIGH);
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Serial.println("2");
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}
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#ifndef RFM02_h
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#define RFM02_h
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#include <SPI.h>
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#include "rfm02_defines.h"
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// defaults
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//#define DEVADDR 0x00
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//#define CHANNEL 0x00
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//#define GDO0 13 // P2.6 on MSP430F2274 on RF2500T
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class RFM02 {
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public:
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RFM02();
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RFM02(uint8_t pinChipSelect, uint8_t pinFSK, uint8_t pinNIRQ);
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//CC2500(uint8_t deviceAddress);
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//CC2500(uint8_t deviceAddress, uint8_t channel);
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void begin();
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//void setDeviceAddress(uint8_t deviceAddress);
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//void setChannel(uint8_t channel);
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//uint8_t getChipVersion();
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//uint8_t getStatusByte();
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//private:
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void writeRegister(uint8_t HighByte, uint8_t LowByte);
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void configureDeviceSettings();
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void CarrierOff();
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void CarrierOn();
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/*
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uint8_t _channel;
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uint8_t _deviceAddress;
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uint8_t _gdo0;
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void writeRegister(uint8_t addr, uint8_t data);
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void writeRegisterBurst(uint8_t saddr, uint8_t *data, uint8_t size);
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uint8_t readRegister(uint8_t addr);
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void readRegisterBurst(uint8_t saddr, uint8_t *data, uint8_t size);
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uint8_t readStatusRegister(uint8_t addr);
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void sendTxBuffer(uint8_t *txBuffer, uint8_t size);
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int8_t receiveRxBuffer(uint8_t *rxBuffer, uint8_t size);
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void execStrobeCommand(uint8_t command);
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void resetDevice();
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*/
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};
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#endif
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/*
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* rfm02_M16_TX_init_fctns.h
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*
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* Created on: 18.09.2014
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*
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* Last changed: 18.09.2014
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*
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* Author: joeder
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*/
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/******************************************************************************/
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/* RFM02_Transmitter Defines */
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/******************************************************************************/
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/* Control Register */
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/******************************************************************************/
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/* RF-Config-Register Initvalue: 8080hex -> For 430MHz-Band , b1(0) b0(1) */
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/* */
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/* Bits: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 */
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/* 1 0 0 b1 b0 d2 d1 d0 x3 x2 x1 x0 ms m2 m1 m0 */
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/* */
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/* default 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 */
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/* */
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/* */
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/* Frequency Deviation [kHz]: m2 m1 m0 value */
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/* 0 0 0 30 * */
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/* 0 0 1 60 */
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/* 0 1 0 90 */
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/* 0 1 1 120 */
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/* 1 0 0 150 */
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/* 1 0 1 180 */
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/* 1 1 0 210 */
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/* */
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/* Modulation Polarity: ms value */
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/* 0 +180° * */
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/* 1 -180° */
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/* */
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/* Crystal Load Capacity: x3 x2 x1 x0 value */
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/* 0 0 0 0 8.5 pF */
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/* 0 0 0 1 9.0 pF */
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/* 0 0 1 0 9.5 pF */
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/* 0 0 1 1 10 pF */
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/* . . . . */
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/* . . . . 12.5 pF * */
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/* . . . . */
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/* 1 1 1 1 16.0 pF */
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/* */
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/* Frequency of Pin CLK: d2 d1 d0 value */
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/* 0 0 0 1 MHz * */
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/* 0 0 1 1.25 MHz */
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/* 0 1 0 1.66 MHz */
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/* 0 1 1 2.0 MHz */
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/* 1 0 0 2.5 MHz */
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/* 1 0 1 3.33 MHz */
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/* 1 1 0 5 MHz */
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/* 1 1 1 10 MHz */
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/* */
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/* If the CLK-Pin is not usesd to clock an external mikrocontroller */
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/* set the dc-Bit in the Power Management Register. */
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/* */
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/* Band Selection: b1 b0 value */
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/* 0 0 315 MHz */
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/* 0 1 433 MHz * */
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/* 1 0 868 MHz */
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/* 1 1 915 MHz */
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/* *: default value */
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/******************************************************************************/
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// set: 433MHz, Deviation 90kHz default: CLK 1MHz, Cap 12.0pF, Modularity +180°
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//#define mrc_QuickSet_RFM02_TX() CONFIG_CMD|=FREQ_DEV_90kHz+BAND_SELECT_433MHz
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#define CONFIG_CMD 0x8000
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/* Frequency Deviation [kHz]: m2 m1 m0 value */
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#define FREQ_DEV_30kHz 0x00 // 0 0 0 0 0 0 0 0
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#define FREQ_DEV_60kHz 0x01
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#define FREQ_DEV_90kHz 0x02
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#define FREQ_DEV_120kHz 0x03
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#define FREQ_DEV_150kHz 0x04
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#define FREQ_DEV_180kHz 0x05
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#define FREQ_DEV_210kHz 0x06 // 0 0 0 0 0 1 1 0
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/* Modulation Polarity: ms value */
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#define MOD_POLTY_180_NEG 0x08 // 0 0 0 0 1 0 0 0
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#define MOD_POLTY_180_POS 0x00
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/* Crystal Load Capacity: x3 x2 x1 x0 value */
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#define CRYSTAL_LD_CAP_08_5PF 0x00 // 8,5pF
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#define CRYSTAL_LD_CAP_09_0PF 0x10 // ...
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#define CRYSTAL_LD_CAP_09_5PF 0x20
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#define CRYSTAL_LD_CAP_10_0PF 0x30
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#define CRYSTAL_LD_CAP_10_5PF 0x40
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#define CRYSTAL_LD_CAP_11_0PF 0x50
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#define CRYSTAL_LD_CAP_11_5PF 0x60
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#define CRYSTAL_LD_CAP_12_0PF 0x70
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#define CRYSTAL_LD_CAP_12_5PF 0x80
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#define CRYSTAL_LD_CAP_13_0PF 0x90
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#define CRYSTAL_LD_CAP_13_5PF 0xA0
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#define CRYSTAL_LD_CAP_14_0PF 0xB0
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#define CRYSTAL_LD_CAP_14_5PF 0xC0
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#define CRYSTAL_LD_CAP_15_0PF 0xD0
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#define CRYSTAL_LD_CAP_15_5PF 0xE0
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#define CRYSTAL_LD_CAP_16_0PF 0xF0
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/* Frequency of Pin CLK: d2 d1 d0 value */
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#define CLK_PIN_FREQ_1_00MHZ 0x0000 // 0 0 0 0 0 0 0 0
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#define CLK_PIN_FREQ_1_25MHZ 0x0100
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#define CLK_PIN_FREQ_1_66MHZ 0x0200 // ...
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#define CLK_PIN_FREQ_2_00MHZ 0x0300
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#define CLK_PIN_FREQ_2_50MHZ 0x0400
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#define CLK_PIN_FREQ_3_33MHZ 0x0500
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#define CLK_PIN_FREQ_5_00MHZ 0x0600
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#define CLK_PIN_FREQ_10_00MHZ 0x0700 // 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0
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/* Band Selection: b1 b0 value ... */
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#define BAND_SELECT_433MHz 0x0800
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#define BAND_SELECT_868MHz 0x1000
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#define BAND_SELECT_915MHz 0x1800
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/******************************************************************************/
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/* RF-Frequency-Adjust-Register Initvalue: A7D0hex */
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/* */
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/* Bits: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 */
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/* 1 0 1 0 f11 f10 f9 f8 f7 f6 f5 f4 f3 f2 f1 f0 */
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/* */
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/* C1 C2 */
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/* 433band: 1 43 */
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/* 868band: 2 43 */
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/* 915band: 3 30 */
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/* */
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/* value ranges from 0x0060..0x0F3F */
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/* */
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/* f = 10MHz * C1 * (C2 + F/4000) default: 435 MHz */
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/* */
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/* */
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/******************************************************************************/
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#define CONFIG_RF_FREQUENY_CMD 0xA000
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// Nothing to do ! leave at 435 MHz
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// Value for frequency must be calculated for the define
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// Value for 439.7575 MHz
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#define RF_FRQUENCY_439_7575_MHZ 0x0F3F // max value
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#define RF_FRQUENCY_435_0000_MHZ 0x07D0 // default
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#define RF_FRQUENCY_430_2400_MHZ 0x0060 // min. value
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/******************************************************************************/
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/* Baudrate-Adjust-Register Initvalue: C800hex */
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/* */
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/* Bits: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 */
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/* 1 1 0 0 1 0 0 0 r7 r6 r5 r4 r3 r2 r1 r0 */
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/* */
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/* Baud Rate = 10MHz/29/(R+1) */
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/* */
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/* R ranges from 0..255 */
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/* */
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/* --> Baud Rate can be set from 1,35 kBit/s .. 344,8 kBit/s */
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/* */
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/* Common values range from 9600 Bit/s .. 115.000 Bit/s */
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/******************************************************************************/
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#define CONFIG_BAUD_RATE_CMD 0xC800
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#define mcr_QuickSet_BaudRate_9600() BAND_SELECT_433MHz|=BAUD_RATE_09_600_BPS
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// Value for baud rate must be calculated for the define
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// Value for 38.400 bps is 7.97988 --> 8
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#define BAUD_RATE_115_000_BPS 0x02
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#define BAUD_RATE_38_400_BPS 0x08
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#define BAUD_RATE_19_200_BPS 0x11
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#define BAUD_RATE_09_600_BPS 0x23
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#define BAUD_RATE_04_800_BPS 0x47
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/******************************************************************************/
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/* RF-Power-Register Initvalue: B0hex */
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/* */
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/* Bits: 7 6 5 4 3 2 1 0 */
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/* 1 0 1 1 OOK p2 p1 p0 */
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/* */
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/* RF-Power = 9 dBm - P - 1 */
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/* */
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/* P ranges from 0..7 */
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/* */
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/* --> RF-Transmit-Power can be set from 1 .. 8 dBm */
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/* */
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/* OOK-Mode: On-Off-Keying via the FSK pin to en/disable the PowerAmp */
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/* */
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/* When OOK is set, Transmit Data must be put in via the SPI-Port, as */
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/* FSK-Input is only the Switch-Input for the Amplifier */
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/* */
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/* */
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/******************************************************************************/
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#define CONFIG_RF_PWR_CMD 0x00B0
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// nothing to do when using FSK as Data-Input
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#define RF_PWR_8DBM 0x0000 // Pmax (default)
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// ...
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#define RF_PWR_4DBM 0x0004
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// ...
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#define RF_PWR_1DBM 0x0007 // Pmin
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#define OOK_ENABLED 0x0080 // TX-Data via SPI, FSK is en/disable RF-Amplifier
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#define OOK_DISABLED 0x0000 // TX-Data via FSK default
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/******************************************************************************/
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/* WakeUp-Timer-Adjust-Register Initvalue: E000hex */
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/* */
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/* Bits: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 */
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/* 1 1 1 r4 r3 r2 r1 r0 m7 m6 m5 m4 m3 m2 m1 m0 */
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/* */
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/* Twu = M * 2^R in ms R: 0..23 */
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/* */
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/* Twu_max = 255 * 2^23 = 24,75 days */
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/* */
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/* Twu_1min = 60000ms --> = 117 * 2^9 --> m=117 r=9 --> 0xE975 */
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/* */
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/* 15s: = 15000ms , 15000/255=58 -> Rmin=58 -> R=6 -> 2^6=64 -> R=6 */
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/* 15000/64=234 -> M=234 Value = 0xE6EA */
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/* */
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/******************************************************************************/
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#define CONFIG_WAKEUP_TIMER_CMD 0xE000
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#define WAKEUP_TIME_01MIN 0xE975
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#define WAKEUP_TIME_15s 0xE6EA
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/******************************************************************************/
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/* LowBattDetect and TxD-sync-Bit-Register Initvalue: C200hex */
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/* */
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/* Bits: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 */
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/* 1 1 0 0 0 0 1 0 dwc 0 ebs t4 t3 t2 t1 t0 */
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/* */
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/* Threshold Voltage is set by t4..t0 with Vlb = 2.2 V + T * 0.1 V */
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/* */
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/* Threshold ranges from 2.2V .. 5.4V */
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/* */
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/* ebs - Enable TX Bit synchronisation function */
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/* */
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/* dwc - Disable wake-up-timer periodical calibration */
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/* */
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/******************************************************************************/
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#define CONFIG_LOW_BATT_TRESHOLD 0xC200
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// default: 2,2V , no TX Bitsync, WUT-Calibration enabled ---> nothing to do
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#define LOW_BATT_THLD_5_4_V 0x1F
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#define LOW_BATT_THLD_3_2_V 0x0A
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// ...
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#define LOW_BATT_THLD_2_8_V 0x06
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#define LOW_BATT_THLD_2_2_V 0x00
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#define TXBIT_SYNC_DISABLED 0x00
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#define TXBIT_SYNC_ENABLED 0x20
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#define DISABLE_WAKEUP_TIMER_CAL 0x80
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#define ENABLE_WAKEUP_TIMER_CAL 0x00
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/******************************************************************************/
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/* Power-Management-Register Initvalue: C000hex */
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/* */
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/* Bits: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 */
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/* 1 1 0 0 0 0 0 0 a1 a0 ex es ea eb et dc */
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/* */
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/* dc - disable CLK at Pin CLK, if not used for the Control MCU */
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/* et - enable wake-up-timer */
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/* eb - enable low battery detection hardware */
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/* ea - enable power amplifier */
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/* es - enable synthesizer */
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/* ex - enable crystal oscillator */
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/* */
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/* a0 - if set, power amplifier is enabled by the data transmit command */
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/* and disabled via the sleep command */
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/* */
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/* a1 - if set, crystal oscillator and synthesizer are enabled via the */
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/* transmit command, and disabled via the sleep command */
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/******************************************************************************/
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// default: CLK-Pin disabled, WUT disabled, LBD disabled, PowerAmp disabled, Syth. disabled, osz disabled,
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// a0, a1 Auto-Mode ctrl-bit no Auto-Mode
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// Send-CMD_PowerOn: CLK disabl, WUT disabl, LBD disabl, PA en, Synth en, Osz en, Auto-PWR dis (0x38 + cmd)
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#define CONFIG_PWR_CMD 0xC000
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#define CLK_PIN_DISABLED 0x01
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#define CLK_PIN_ENABLED 0x00
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#define WAKE_UP_TIMER_ENABLED 0x02
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#define WAKE_UP_TIMER_DISABLED 0x00
|
||||
#define LOW_BATT_DET_ENABLED 0x04
|
||||
#define LOW_BATT_DET_DISABLED 0x00
|
||||
#define POWER_AMP_ENABLED 0x08
|
||||
#define POWER_AMP_DISABLED 0x00
|
||||
#define SYNTHESSIZER_ENABLED 0x10
|
||||
#define SYNTHESSIZER_DISABLED 0x00
|
||||
#define CRYSTAL_OSC_ENABLED 0x20
|
||||
#define CRYSTAL_OSC_DISABLED 0x00
|
||||
#define AUTO_PWR_AMP_ENABLED 0x40
|
||||
#define AUTO_PWR_AMP_DISABLED 0x00
|
||||
#define AUTO_PWR_SYN_OSC_ENABLED 0x80
|
||||
#define AUTO_PWR_SYN_OSC_DISABLED 0x00
|
||||
|
||||
#define NORMAL_MODE 0x38
|
||||
#define AUTO_MODE 0xC0
|
||||
|
||||
#define DISABLED 0x00
|
||||
#define ENABLED 0x01
|
||||
Ładowanie…
Reference in New Issue