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kopia lustrzana https://github.com/Wren6991/Pico-DVI-Sock
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Tweak silkscreen layout/orientation to match Pico

master
Luke Wren 2021-02-02 10:47:35 +00:00
rodzic e546724bcd
commit d6e5a85498
5 zmienionych plików z 50 dodań i 5271 usunięć
Pokaż statystyki Ściągnij plik aktualizacji Ściągnij plik porównania Expand all files Collapse all files

1
.gitignore vendored
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@ -1 +1,2 @@
dvi-sock-backups
_autosave-*

5227
_autosave-dvi-sock.kicad_pcb
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Plik diff jest za duży Load Diff

91
dvi-sock.kicad_pcb
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@ -207,7 +207,7 @@
(net 24 "+5V") (pinfunction "Pin_1") (pintype "passive") (tstamp 9041c3f3-4a34-464b-99b7-b0503546fb6f))
(pad "2" thru_hole oval (at 0 2.54 90) (locked) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 "GND") (pinfunction "Pin_2") (pintype "passive") (tstamp fe5f8948-23fc-456b-b66d-65c799d54cc3))
(model "${KICAD6_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl"
(model "${KICAD6_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl" hide
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@ -712,13 +712,14 @@
(gr_line (start 151.5 95.5) (end 151.9 95.5) (layer "F.SilkS") (width 0.12) (tstamp 26ec8a17-ee4f-4e38-bff7-e61b31b86762))
(gr_line (start 154.4 81.4) (end 154.4 74.5) (layer "F.SilkS") (width 0.12) (tstamp 4223750d-84c3-4897-b072-6bc59c9ebe43))
(gr_line (start 143.9 95.5) (end 144.3 95.5) (layer "F.SilkS") (width 0.12) (tstamp 63a9a42a-9bca-4ae5-929c-e4bcf682dd3d))
(gr_line (start 163.6 94.8) (end 164.1 94.8) (layer "F.SilkS") (width 0.12) (tstamp 78beb943-be1e-48ec-a9cd-836377979fba))
(gr_line (start 144.3 74.5) (end 143.9 74.5) (layer "F.SilkS") (width 0.12) (tstamp 7bbe7931-b048-4942-ac51-bc71b792a403))
(gr_line (start 154.4 86.1) (end 154.4 86.5) (layer "F.SilkS") (width 0.12) (tstamp 8ec87c4f-185e-493e-9923-4255354a7e22))
(gr_line (start 151.9 74.5) (end 151.5 74.5) (layer "F.SilkS") (width 0.12) (tstamp 96090691-0377-4d5b-b3d1-ea5e1cf18228))
(gr_line (start 154.4 88.6) (end 154.4 95.5) (layer "F.SilkS") (width 0.12) (tstamp a60309b7-c079-4668-b8a3-87f08cb61080))
(gr_line (start 146.9 74.5) (end 146.4 74.5) (layer "F.SilkS") (width 0.12) (tstamp ae4bbbfa-6627-4a67-a0cc-b4f54d6d8f2d))
(gr_line (start 149.4 74.5) (end 149 74.5) (layer "F.SilkS") (width 0.12) (tstamp b259f302-4491-41d3-b546-cc07fb0d3334))
(gr_line (start 158.75 93.75) (end 158 92.25) (layer "F.SilkS") (width 0.12) (tstamp b5eb7e31-9b3e-4098-9cdc-a57c215415d6))
(gr_line (start 158.75 93.75) (end 157.9 92.4) (layer "F.SilkS") (width 0.12) (tstamp b5eb7e31-9b3e-4098-9cdc-a57c215415d6))
(gr_line (start 154.4 83.5) (end 154.4 83.9) (layer "F.SilkS") (width 0.12) (tstamp f1a8c522-ae50-46fb-9151-ed817c11cab0))
(gr_line (start 154.4 95.5) (end 154.1 95.5) (layer "F.SilkS") (width 0.12) (tstamp f2a71667-4a08-4d5f-8bd9-ddbea18f7018))
(gr_line (start 146.4 95.5) (end 146.9 95.5) (layer "F.SilkS") (width 0.12) (tstamp f66d3838-1b7c-443a-8039-44ab0feabad1))
@ -733,19 +734,19 @@
(gr_text "NOT HDMI\njust sparkling DVI" (at 164.75 85 90) (layer "B.SilkS") (tstamp 3313ad13-8024-48fe-b693-5fc830d4bcc2)
(effects (font (size 1 1) (thickness 0.25)) (justify mirror))
)
(gr_text "GP12: D0+\nGP13: D0-\nGP14: CK+\nGP15: CK-\nGP16: D2+\nGP17: D2-\nGP18: D1+\nGP19: D1-" (at 147 85) (layer "B.SilkS") (tstamp 67f2def8-097f-4190-a182-c3aa146502dd)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
(gr_text "GP12: D0+ GP16: D2+\nGP13: D0- GP17: D2-\nGP14: CK+ GP18: D1+\nGP15: CK- GP19: D1-" (at 146.6 85 90) (layer "B.SilkS") (tstamp 67f2def8-097f-4190-a182-c3aa146502dd)
(effects (font (size 1 0.9) (thickness 0.13)) (justify mirror))
)
(gr_text "Rev A" (at 165.26 94.89) (layer "B.SilkS") (tstamp dbb55bc0-0d7a-4839-8685-7ecb74e3b206)
(gr_text "Rev A" (at 158.65 85.05 90) (layer "B.SilkS") (tstamp dbb55bc0-0d7a-4839-8685-7ecb74e3b206)
(effects (font (size 0.7 0.7) (thickness 0.12)) (justify mirror))
)
(gr_text "Pico DVI Sock" (at 162.58 75.14) (layer "F.SilkS") (tstamp 12db8688-31ff-420d-943f-17998fe6e434)
(gr_text "Pico DVI Sock" (at 162.58 75.14 180) (layer "F.SilkS") (tstamp 12db8688-31ff-420d-943f-17998fe6e434)
(effects (font (size 0.9 0.8) (thickness 0.12)))
)
(gr_text "GP17" (at 150.368 79.248 90) (layer "F.SilkS") (tstamp 1f546fc3-35e9-481a-8da7-269131c9999e)
(effects (font (size 0.8 0.8) (thickness 0.12)))
)
(gr_text "+5V" (at 157.19 91.53) (layer "F.SilkS") (tstamp 2a9c6ffd-9b1f-42b0-930a-19389fa17e03)
(gr_text "+5V" (at 157.5 91.7 180) (layer "F.SilkS") (tstamp 2a9c6ffd-9b1f-42b0-930a-19389fa17e03)
(effects (font (size 0.7 0.7) (thickness 0.12)))
)
(gr_text "GP16" (at 152.908 79.248 90) (layer "F.SilkS") (tstamp 31ae219d-7409-4e9b-8805-dc9216ff27c3)
@ -769,7 +770,7 @@
(gr_text "GP14" (at 150.368 90.424 90) (layer "F.SilkS") (tstamp b99d64c7-48ce-4a69-b42b-40e62315c90a)
(effects (font (size 0.8 0.8) (thickness 0.12)))
)
(gr_text "GND" (at 164.75 94.75) (layer "F.SilkS") (tstamp c89adcfa-347c-4fde-a12c-87499733d023)
(gr_text "GND" (at 165.25 94.75 180) (layer "F.SilkS") (tstamp c89adcfa-347c-4fde-a12c-87499733d023)
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)
(gr_text "GP12" (at 142.748 90.424 90) (layer "F.SilkS") (tstamp debc335c-ad96-4af2-826d-830231e3528f)
@ -802,7 +803,7 @@
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(via (at 143.26 77.37) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (free) (net 3) (tstamp 18b041a7-6a1b-4a7d-980d-289adc200ea1))
(via (at 156 89.5) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (free) (net 3) (tstamp 2cd2d303-a80e-4a02-b045-d11b954448b5))
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(via (at 157.45 82.25) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (free) (net 3) (tstamp 5a62724d-459b-4c61-ad78-add469a40639))
(via (at 154.8 74.25) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (free) (net 3) (tstamp 5f3cee1d-21b1-40d2-bef6-3280c6bdf830))
(via (at 152.6 92.6) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (free) (net 3) (tstamp 6d606d9e-e376-4d7d-8302-ac8df23170c6))
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2
dvi-sock.kicad_prl
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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 37,
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_nets": [],

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