kopia lustrzana https://github.com/sp5wwp/M17_ANL_v2
Added schematic and electronic elements libraries
Nikoloz Glonti
rodzic
60e0c75712
commit
bc2cb1f63b
|
|
@ -0,0 +1,264 @@
|
|||
update=pią, 20 gru 2019, 17:48:52
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||||
version=1
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||||
last_client=kicad
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||||
[general]
|
||||
version=1
|
||||
RootSch=
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||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
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[eeschema/libraries]
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||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=/niko2/Szkicowniki/Kicad/SiModeM_v2/
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
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||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
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MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
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||||
TrackWidth2=0.25
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TrackWidth3=0.35
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||||
TrackWidth4=0.4
|
||||
TrackWidth5=0.45
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||||
TrackWidth6=0.55
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||||
TrackWidth7=0.65
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||||
TrackWidth8=0.75
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||||
TrackWidth9=0.8
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TrackWidth10=0.9
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TrackWidth11=1
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ViaDiameter1=0.8
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||||
ViaDrill1=0.4
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||||
ViaDiameter2=0.4
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||||
ViaDrill2=0.3
|
||||
ViaDiameter3=0.5
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ViaDrill3=0.3
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ViaDiameter4=1
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||||
ViaDrill4=0.8
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dPairWidth1=0.2
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dPairGap1=0.25
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dPairViaGap1=0.25
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SilkLineWidth=0.15
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SilkTextSizeV=0.7
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SilkTextSizeH=0.7
|
||||
SilkTextSizeThickness=0.15
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SilkTextItalic=0
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SilkTextUpright=1
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CopperLineWidth=0.2
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CopperTextSizeV=1.5
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CopperTextSizeH=1.5
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CopperTextThickness=0.3
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CopperTextItalic=0
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CopperTextUpright=1
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EdgeCutLineWidth=0.09999999999999999
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CourtyardLineWidth=0.05
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OthersLineWidth=0.15
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OthersTextSizeV=1
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OthersTextSizeH=1
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OthersTextSizeThickness=0.15
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OthersTextItalic=0
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OthersTextUpright=1
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SolderMaskClearance=0
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SolderMaskMinWidth=0
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SolderPasteClearance=0
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SolderPasteRatio=-0
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[pcbnew/Layer.F.Cu]
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Name=F.Cu
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Type=0
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Enabled=1
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[pcbnew/Layer.In1.Cu]
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Name=In1.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In2.Cu]
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Name=In2.Cu
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Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In3.Cu]
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Name=In3.Cu
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||||
Type=0
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||||
Enabled=0
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[pcbnew/Layer.In4.Cu]
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Name=In4.Cu
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Type=0
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Enabled=0
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||||
[pcbnew/Layer.In5.Cu]
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Name=In5.Cu
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Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In6.Cu]
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Name=In6.Cu
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Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In7.Cu]
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||||
Name=In7.Cu
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||||
Type=0
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||||
Enabled=0
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[pcbnew/Layer.In8.Cu]
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Name=In8.Cu
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Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In9.Cu]
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Name=In9.Cu
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||||
Type=0
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||||
Enabled=0
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[pcbnew/Layer.In10.Cu]
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Name=In10.Cu
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Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In11.Cu]
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Name=In11.Cu
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||||
Type=0
|
||||
Enabled=0
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||||
[pcbnew/Layer.In12.Cu]
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Name=In12.Cu
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Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In13.Cu]
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||||
Name=In13.Cu
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||||
Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In14.Cu]
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Name=In14.Cu
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||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
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||||
Name=In15.Cu
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||||
Type=0
|
||||
Enabled=0
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||||
[pcbnew/Layer.In16.Cu]
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||||
Name=In16.Cu
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||||
Type=0
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||||
Enabled=0
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[pcbnew/Layer.In17.Cu]
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Name=In17.Cu
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||||
Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In18.Cu]
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Name=In18.Cu
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Type=0
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||||
Enabled=0
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[pcbnew/Layer.In19.Cu]
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Name=In19.Cu
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Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In20.Cu]
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Name=In20.Cu
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||||
Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In21.Cu]
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||||
Name=In21.Cu
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||||
Type=0
|
||||
Enabled=0
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||||
[pcbnew/Layer.In22.Cu]
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Name=In22.Cu
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||||
Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In23.Cu]
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||||
Name=In23.Cu
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||||
Type=0
|
||||
Enabled=0
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||||
[pcbnew/Layer.In24.Cu]
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||||
Name=In24.Cu
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||||
Type=0
|
||||
Enabled=0
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||||
[pcbnew/Layer.In25.Cu]
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||||
Name=In25.Cu
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||||
Type=0
|
||||
Enabled=0
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||||
[pcbnew/Layer.In26.Cu]
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||||
Name=In26.Cu
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||||
Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In27.Cu]
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Name=In27.Cu
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||||
Type=0
|
||||
Enabled=0
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||||
[pcbnew/Layer.In28.Cu]
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||||
Name=In28.Cu
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||||
Type=0
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||||
Enabled=0
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||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
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||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
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||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
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||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
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||||
ViaDiameter=0.8
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||||
ViaDrill=0.4
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uViaDiameter=0.3
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||||
uViaDrill=0.1
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dPairWidth=0.2
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||||
dPairGap=0.25
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||||
dPairViaGap=0.25
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Plik diff jest za duży
Load Diff
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@ -0,0 +1,3 @@
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EESchema-DOCLIB Version 2.0
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#
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#End Doc Library
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@ -0,0 +1,8 @@
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EESchema-DOCLIB Version 2.0
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#
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$CMP ADF7021-VBCPZ-RL
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D Narrow-Band Transceiver IC
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F https://www.arrow.com/en/products/adf7021-vbcpz-rl/analog-devices
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$ENDCMP
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||||
#
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#End Doc Library
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@ -0,0 +1,82 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# ADF7021
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#
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||||
DEF ADF7021 U 0 40 Y Y 1 F N
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F0 "U" 0 0 50 H V C CNN
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F1 "ADF7021" 0 0 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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||||
DRAW
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||||
ENDDRAW
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ENDDEF
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||||
#
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# ADF7021-VBCPZ-RL
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#
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||||
DEF ADF7021-VBCPZ-RL IC 0 30 Y Y 1 F N
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||||
F0 "IC" 1650 700 50 H V L CNN
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||||
F1 "ADF7021-VBCPZ-RL" 1650 600 50 H V L CNN
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||||
F2 "QFN50P700X700X80-49N" 1650 500 50 H I L CNN
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||||
F3 "https://www.arrow.com/en/products/adf7021-vbcpz-rl/analog-devices" 1650 400 50 H I L CNN
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||||
F4 "Narrow-Band Transceiver IC" 1650 300 50 H I L CNN "Description"
|
||||
F5 "0.8" 1650 200 50 H I L CNN "Height"
|
||||
F6 "Analog Devices" 1650 100 50 H I L CNN "Manufacturer_Name"
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||||
F7 "ADF7021-VBCPZ-RL" 1650 0 50 H I L CNN "Manufacturer_Part_Number"
|
||||
F8 "584-ADF7021-VBCPZ-R" 1650 -100 50 H I L CNN "Mouser Part Number"
|
||||
F9 "https://www.mouser.com/Search/Refine.aspx?Keyword=584-ADF7021-VBCPZ-R" 1650 -200 50 H I L CNN "Mouser Price/Stock"
|
||||
DRAW
|
||||
P 5 0 1 6 200 500 1600 500 1600 -1700 200 -1700 200 500 N
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||||
X VCOIN 1 0 0 200 R 50 50 0 0 U
|
||||
X RSET 10 0 -900 200 R 50 50 0 0 U
|
||||
X CREG4 11 0 -1000 200 R 50 50 0 0 U
|
||||
X GND4_1 12 0 -1100 200 R 50 50 0 0 U
|
||||
X MIX_I 13 300 -1900 200 U 50 50 0 0 U
|
||||
X ~MIX_I 14 400 -1900 200 U 50 50 0 0 U
|
||||
X MIX_Q 15 500 -1900 200 U 50 50 0 0 U
|
||||
X ~MIX_Q 16 600 -1900 200 U 50 50 0 0 U
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||||
X FILT_I 17 700 -1900 200 U 50 50 0 0 U
|
||||
X ~FILT_I 18 800 -1900 200 U 50 50 0 0 U
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||||
X GND4_2 19 900 -1900 200 U 50 50 0 0 U
|
||||
X CREG1 2 0 -100 200 R 50 50 0 0 U
|
||||
X FILT_Q 20 1000 -1900 200 U 50 50 0 0 U
|
||||
X ~FILT_Q 21 1100 -1900 200 U 50 50 0 0 U
|
||||
X GND4_3 22 1200 -1900 200 U 50 50 0 0 U
|
||||
X TEST_A 23 1300 -1900 200 U 50 50 0 0 U
|
||||
X CE 24 1400 -1900 200 U 50 50 0 0 U
|
||||
X SLE 25 1800 -1100 200 L 50 50 0 0 U
|
||||
X SDATA 26 1800 -1000 200 L 50 50 0 0 U
|
||||
X SREAD 27 1800 -900 200 L 50 50 0 0 U
|
||||
X SCLK 28 1800 -800 200 L 50 50 0 0 U
|
||||
X GND2 29 1800 -700 200 L 50 50 0 0 U
|
||||
X VDD1 3 0 -200 200 R 50 50 0 0 U
|
||||
X ADCIN 30 1800 -600 200 L 50 50 0 0 U
|
||||
X CREG2 31 1800 -500 200 L 50 50 0 0 U
|
||||
X VDD2 32 1800 -400 200 L 50 50 0 0 U
|
||||
X SWD 33 1800 -300 200 L 50 50 0 0 U
|
||||
X TXRXDATA 34 1800 -200 200 L 50 50 0 0 U
|
||||
X TXRXCLK 35 1800 -100 200 L 50 50 0 0 U
|
||||
X CLKOUT 36 1800 0 200 L 50 50 0 0 U
|
||||
X MUXOUT 37 1500 700 200 D 50 50 0 0 U
|
||||
X OSC2 38 1400 700 200 D 50 50 0 0 U
|
||||
X OSC1 39 1300 700 200 D 50 50 0 0 U
|
||||
X RFOUT 4 0 -300 200 R 50 50 0 0 U
|
||||
X VDD3 40 1200 700 200 D 50 50 0 0 U
|
||||
X CREG3 41 1100 700 200 D 50 50 0 0 U
|
||||
X CPOUT 42 1000 700 200 D 50 50 0 0 U
|
||||
X VDD 43 900 700 200 D 50 50 0 0 U
|
||||
X L2 44 800 700 200 D 50 50 0 0 U
|
||||
X GND 45 700 700 200 D 50 50 0 0 U
|
||||
X L1 46 600 700 200 D 50 50 0 0 U
|
||||
X GND1 47 500 700 200 D 50 50 0 0 U
|
||||
X CVCO 48 400 700 200 D 50 50 0 0 U
|
||||
X EP 49 300 700 200 D 50 50 0 0 U
|
||||
X RFGND 5 0 -400 200 R 50 50 0 0 U
|
||||
X RFIN 6 0 -500 200 R 50 50 0 0 U
|
||||
X ~RFIN 7 0 -600 200 R 50 50 0 0 U
|
||||
X RLNA 8 0 -700 200 R 50 50 0 0 U
|
||||
X VDD4 9 0 -800 200 R 50 50 0 0 U
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
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@ -0,0 +1,78 @@
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(module ADF7021 (layer F.Cu) (tedit 0)
|
||||
(descr ADF7021)
|
||||
(tags "Integrated Circuit")
|
||||
(attr smd)
|
||||
(fp_text reference IC** (at 0 0) (layer F.SilkS)
|
||||
(effects (font (size 1.27 1.27) (thickness 0.254)))
|
||||
)
|
||||
(fp_text value ADF7021 (at 0 0) (layer F.SilkS) hide
|
||||
(effects (font (size 1.27 1.27) (thickness 0.254)))
|
||||
)
|
||||
(fp_circle (center -3.875 -3.5) (end -3.875 -3.375) (layer F.SilkS) (width 0.25))
|
||||
(fp_line (start -3.5 -3) (end -3 -3.5) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -3.5 3.5) (end -3.5 -3.5) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -3.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -4.125 4.125) (end -4.125 -4.125) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 4.125 4.125) (end -4.125 4.125) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 4.125 -4.125) (end 4.125 4.125) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -4.125 -4.125) (end 4.125 -4.125) (layer F.CrtYd) (width 0.05))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 1.27 1.27) (thickness 0.254)))
|
||||
)
|
||||
(pad 49 smd rect (at 0 0) (size 4.25 4.25) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 48 smd rect (at -2.75 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 47 smd rect (at -2.25 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 46 smd rect (at -1.75 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 45 smd rect (at -1.25 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 44 smd rect (at -0.75 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 43 smd rect (at -0.25 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 42 smd rect (at 0.25 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 41 smd rect (at 0.75 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 40 smd rect (at 1.25 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 39 smd rect (at 1.75 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 38 smd rect (at 2.25 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 37 smd rect (at 2.75 -3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 36 smd rect (at 3.45 -2.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 35 smd rect (at 3.45 -2.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 34 smd rect (at 3.45 -1.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 33 smd rect (at 3.45 -1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 32 smd rect (at 3.45 -0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 31 smd rect (at 3.45 -0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 30 smd rect (at 3.45 0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 29 smd rect (at 3.45 0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 28 smd rect (at 3.45 1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 27 smd rect (at 3.45 1.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 26 smd rect (at 3.45 2.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 25 smd rect (at 3.45 2.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 24 smd rect (at 2.75 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 23 smd rect (at 2.25 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 22 smd rect (at 1.75 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 21 smd rect (at 1.25 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 20 smd rect (at 0.75 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 19 smd rect (at 0.25 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 18 smd rect (at -0.25 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 17 smd rect (at -0.75 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 16 smd rect (at -1.25 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 15 smd rect (at -1.75 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 14 smd rect (at -2.25 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 13 smd rect (at -2.75 3.45) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 12 smd rect (at -3.45 2.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 11 smd rect (at -3.45 2.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 10 smd rect (at -3.45 1.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 9 smd rect (at -3.45 1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 8 smd rect (at -3.45 0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 7 smd rect (at -3.45 0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 6 smd rect (at -3.45 -0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 5 smd rect (at -3.45 -0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 4 smd rect (at -3.45 -1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 3 smd rect (at -3.45 -1.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 2 smd rect (at -3.45 -2.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 1 smd rect (at -3.45 -2.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask))
|
||||
(model ADF7021-VBCPZ-RL.stp
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
(module L-0402CS (layer F.Cu) (tedit 5DF415BD)
|
||||
(attr smd)
|
||||
(fp_text reference L-0402CS (at 0.1016 -1.1176) (layer F.SilkS)
|
||||
(effects (font (size 0.6 0.6) (thickness 0.05)))
|
||||
)
|
||||
(fp_text value VAL** (at 1.1176 1.1684) (layer F.SilkS)
|
||||
(effects (font (size 0.6 0.6) (thickness 0.05)))
|
||||
)
|
||||
(fp_line (start -1.016 -0.4572) (end 1.0668 -0.4572) (layer Eco2.User) (width 0.12))
|
||||
(fp_line (start 1.0668 -0.4572) (end 1.0668 0.4572) (layer Eco2.User) (width 0.12))
|
||||
(fp_line (start 1.0668 0.4572) (end -1.0668 0.4572) (layer Eco2.User) (width 0.12))
|
||||
(fp_line (start -1.0668 0.4572) (end -1.0668 -0.4572) (layer Eco2.User) (width 0.12))
|
||||
(fp_line (start -1.0668 -0.4572) (end -1.016 -0.4572) (layer Eco2.User) (width 0.12))
|
||||
(pad 1 smd rect (at -0.6477 0) (size 0.66 0.66) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 2 smd rect (at 0.6477 0) (size 0.66 0.66) (layers F.Cu F.Paste F.Mask))
|
||||
)
|
||||
Ładowanie…
Reference in New Issue