kopia lustrzana https://github.com/Hamlib/Hamlib
575 wiersze
14 KiB
C
575 wiersze
14 KiB
C
/*
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* Hamlib HiQSDR backend
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* Copyright (c) 20012 by Stephane Fillod
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <hamlib/config.h>
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#include <stdlib.h>
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#include <stdio.h> /* Standard input/output definitions */
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#include <string.h> /* String function definitions */
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#include <fcntl.h> /* File control definitions */
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#include <errno.h> /* Error number definitions */
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#include "hamlib/rig.h"
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#include "iofunc.h"
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#include "misc.h"
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#include "token.h"
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/*
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* http://www.hiqsdr.org
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*/
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/* HiQSDR constants */
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#define REFCLOCK 122880000
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#define DEFAULT_SAMPLE_RATE 48000
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/* V1.1 */
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#define CTRL_FRAME_LEN 22
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struct hiqsdr_priv_data
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{
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split_t split;
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int sample_rate;
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double ref_clock;
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unsigned char control_frame[CTRL_FRAME_LEN];
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};
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static int hiqsdr_init(RIG *rig);
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static int hiqsdr_cleanup(RIG *rig);
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static int hiqsdr_open(RIG *rig);
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static int hiqsdr_close(RIG *rig);
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static int hiqsdr_set_freq(RIG *rig, vfo_t vfo, freq_t freq);
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static int hiqsdr_get_freq(RIG *rig, vfo_t vfo, freq_t *freq);
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static int hiqsdr_set_split_vfo(RIG *rig, vfo_t vfo, split_t split,
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vfo_t tx_vfo);
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static int hiqsdr_set_split_freq(RIG *rig, vfo_t vfo, freq_t tx_freq);
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static int hiqsdr_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width);
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static int hiqsdr_set_ptt(RIG *rig, vfo_t vfo, ptt_t ptt);
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static int hiqsdr_set_ant(RIG *rig, vfo_t vfo, ant_t ant, value_t option);
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static int hiqsdr_set_conf(RIG *rig, token_t token, const char *val);
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static int hiqsdr_get_conf(RIG *rig, token_t token, char *val);
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static int hiqsdr_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val);
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static int hiqsdr_get_level(RIG *rig, vfo_t vfo, setting_t level, value_t *val);
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#define TOK_OSCFREQ TOKEN_BACKEND(1)
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#define TOK_SAMPLE_RATE TOKEN_BACKEND(2)
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const struct confparams hiqsdr_cfg_params[] =
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{
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{
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TOK_OSCFREQ, "osc_freq", "Oscillator freq", "Oscillator frequency of reference clock in Hz",
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"122880000", RIG_CONF_NUMERIC, { .n = { 0, MHz(256), 1 } }
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},
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{
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TOK_SAMPLE_RATE, "sample_rate", "Sample rate", "Sample rate",
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"48000", RIG_CONF_NUMERIC, { /* .n = */ { 48000, 1920000, 1 } }
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},
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{ RIG_CONF_END, NULL, }
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};
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/*
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* HiQSDR rig capabilities.
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*/
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#define HIQSDR_FUNC RIG_FUNC_NONE
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#define HIQSDR_LEVEL (RIG_LEVEL_RFPOWER|RIG_LEVEL_PREAMP|RIG_LEVEL_ATT)
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#define HIQSDR_PARM RIG_PARM_NONE
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#define HIQSDR_VFO_OP RIG_OP_NONE
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#define HIQSDR_SCAN RIG_SCAN_NONE
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#define HIQSDR_VFO (RIG_VFO_A)
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#define HIQSDR_ANT (RIG_ANT_1|RIG_ANT_2)
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#define HIQSDR_MODES (RIG_MODE_CW|RIG_MODE_DSB)
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const struct rig_caps hiqsdr_caps =
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{
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RIG_MODEL(RIG_MODEL_HIQSDR),
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.model_name = "HiQSDR",
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.mfg_name = "N2ADR",
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.version = "20200323.0",
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.copyright = "LGPL",
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.status = RIG_STATUS_ALPHA,
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.rig_type = RIG_TYPE_TUNER,
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.targetable_vfo = RIG_TARGETABLE_NONE,
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.ptt_type = RIG_PTT_RIG,
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.dcd_type = RIG_DCD_NONE,
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.port_type = RIG_PORT_UDP_NETWORK,
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.timeout = 500,
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.has_get_func = HIQSDR_FUNC,
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.has_set_func = HIQSDR_FUNC,
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.has_get_level = HIQSDR_LEVEL,
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.has_set_level = RIG_LEVEL_SET(HIQSDR_LEVEL),
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.has_get_parm = HIQSDR_PARM,
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.has_set_parm = RIG_PARM_SET(HIQSDR_PARM),
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.ctcss_list = NULL,
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.dcs_list = NULL,
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.chan_list = { RIG_CHAN_END, },
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.scan_ops = HIQSDR_SCAN,
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.vfo_ops = HIQSDR_VFO_OP,
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.transceive = RIG_TRN_OFF,
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.attenuator = { 2, 4, 6, 10, 20, 30, 44, RIG_DBLST_END }, // -2dB steps in fact
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.preamp = { 10, RIG_DBLST_END, }, // TODO
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.rx_range_list1 = { {
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.startf = kHz(100), .endf = MHz(66), .modes = HIQSDR_MODES,
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.low_power = -1, .high_power = -1, HIQSDR_VFO, HIQSDR_ANT
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},
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RIG_FRNG_END,
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},
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.tx_range_list1 = { {
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.startf = kHz(100), .endf = MHz(66), .modes = HIQSDR_MODES,
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.low_power = mW(1), .high_power = mW(50), HIQSDR_VFO, HIQSDR_ANT
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},
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RIG_FRNG_END,
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},
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.rx_range_list2 = { {
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.startf = kHz(100), .endf = MHz(66), .modes = HIQSDR_MODES,
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.low_power = -1, .high_power = -1, HIQSDR_VFO, HIQSDR_ANT
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},
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RIG_FRNG_END,
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},
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.tx_range_list2 = { {
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.startf = kHz(100), .endf = MHz(66), .modes = HIQSDR_MODES,
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.low_power = mW(1), .high_power = mW(50), HIQSDR_VFO, HIQSDR_ANT
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},
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RIG_FRNG_END,
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},
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.tuning_steps = { {HIQSDR_MODES, 1}, RIG_TS_END, },
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.filters = {
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{RIG_MODE_CW, kHz(2.4)},
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{HIQSDR_MODES, RIG_FLT_ANY},
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RIG_FLT_END,
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},
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.priv = NULL,
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.rig_init = hiqsdr_init,
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.rig_cleanup = hiqsdr_cleanup,
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.rig_open = hiqsdr_open,
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.rig_close = hiqsdr_close,
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.cfgparams = hiqsdr_cfg_params,
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.set_conf = hiqsdr_set_conf,
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.get_conf = hiqsdr_get_conf,
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.set_freq = hiqsdr_set_freq,
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.get_freq = hiqsdr_get_freq,
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.set_split_freq = hiqsdr_set_split_freq,
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.set_split_vfo = hiqsdr_set_split_vfo,
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.set_mode = hiqsdr_set_mode,
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.set_ptt = hiqsdr_set_ptt,
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.set_ant = hiqsdr_set_ant,
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.set_level = hiqsdr_set_level,
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.get_level = hiqsdr_get_level,
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.hamlib_check_rig_caps = HAMLIB_CHECK_RIG_CAPS
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};
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static int send_command(RIG *rig)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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ret = write_block(&rig->state.rigport, (unsigned char *) priv->control_frame,
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CTRL_FRAME_LEN);
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#if 0
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ret = read_block(&rig->state.rigport, (unsigned char *) priv->control_frame,
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CTRL_FRAME_LEN);
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if (ret != CTRL_FRAME_LEN)
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{
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ret = ret < 0 ? ret : -RIG_EPROTO;
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}
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#endif
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return ret;
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}
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static unsigned compute_sample_rate(const struct hiqsdr_priv_data *priv)
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{
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unsigned rx_control;
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rx_control = (unsigned)(priv->ref_clock / (8. * 8. * priv->sample_rate)) - 1;
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if (rx_control > 39)
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{
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rx_control = 39;
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}
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return rx_control;
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}
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/*
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* Assumes rig!=NULL, rig->state.priv!=NULL
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*/
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int hiqsdr_set_conf(RIG *rig, token_t token, const char *val)
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{
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struct hiqsdr_priv_data *priv;
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struct rig_state *rs;
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rs = &rig->state;
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priv = (struct hiqsdr_priv_data *)rs->priv;
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switch (token)
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{
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case TOK_OSCFREQ:
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priv->ref_clock = atof(val);
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priv->control_frame[12] = compute_sample_rate(priv);
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break;
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case TOK_SAMPLE_RATE:
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priv->sample_rate = atoi(val);
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priv->control_frame[12] = compute_sample_rate(priv);
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break;
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default:
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return -RIG_EINVAL;
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}
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return RIG_OK;
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}
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/*
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* assumes rig!=NULL,
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* Assumes rig!=NULL, rig->state.priv!=NULL
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* and val points to a buffer big enough to hold the conf value.
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*/
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int hiqsdr_get_conf2(RIG *rig, token_t token, char *val, int val_len)
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{
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struct hiqsdr_priv_data *priv;
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struct rig_state *rs;
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rs = &rig->state;
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priv = (struct hiqsdr_priv_data *)rs->priv;
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switch (token)
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{
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case TOK_OSCFREQ:
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SNPRINTF(val, val_len, "%f", priv->ref_clock);
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break;
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case TOK_SAMPLE_RATE:
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SNPRINTF(val, val_len, "%d", priv->sample_rate);
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break;
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default:
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return -RIG_EINVAL;
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}
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return RIG_OK;
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}
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int hiqsdr_get_conf(RIG *rig, token_t token, char *val)
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{
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return hiqsdr_get_conf2(rig, token, val, 128);
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}
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int hiqsdr_init(RIG *rig)
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{
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struct hiqsdr_priv_data *priv;
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rig_debug(RIG_DEBUG_VERBOSE, "%s called\n", __func__);
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rig->state.priv = (struct hiqsdr_priv_data *)calloc(1, sizeof(
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struct hiqsdr_priv_data));
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if (!rig->state.priv)
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{
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return -RIG_ENOMEM;
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}
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priv = rig->state.priv;
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priv->split = RIG_SPLIT_OFF;
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priv->ref_clock = REFCLOCK;
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priv->sample_rate = DEFAULT_SAMPLE_RATE;
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strncpy(rig->state.rigport.pathname, "192.168.2.196:48248",
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HAMLIB_FILPATHLEN - 1);
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return RIG_OK;
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}
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int hiqsdr_open(RIG *rig)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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#if 0
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const char buf_send_to_me[] = { 0x72, 0x72 };
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int ret;
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#endif
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rig_debug(RIG_DEBUG_TRACE, "%s called\n", __func__);
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/* magic value */
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priv->control_frame[0] = 'S';
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priv->control_frame[1] = 't';
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/* zero tune phase */
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memset(priv->control_frame + 2, 0, 8);
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/* TX output level */
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priv->control_frame[10] = 120;
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/* Tx control: non-CW */
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priv->control_frame[11] = 0x02;
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/* decimation: 48 kSpls */
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priv->control_frame[12] = compute_sample_rate(priv);
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/* firmware version */
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priv->control_frame[13] = 0x00;
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/* X1 connector */
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priv->control_frame[14] = 0x00;
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/* Attenuator */
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priv->control_frame[15] = 0x00;
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/* AntSwitch */
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priv->control_frame[16] = 0x00;
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/* RFU */
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memset(priv->control_frame + 17, 0, 5);
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#if 0
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/* Send the samples to me. FIXME: send to port 48247 */
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ret = write_block(&rig->state.rigport, buf_send_to_me, sizeof(buf_send_to_me));
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if (ret != RIG_OK)
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{
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return RIG_OK;
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}
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#endif
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return RIG_OK;
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}
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int hiqsdr_close(RIG *rig)
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{
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rig_debug(RIG_DEBUG_VERBOSE, "%s called\n", __func__);
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return RIG_OK;
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}
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int hiqsdr_cleanup(RIG *rig)
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{
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rig_debug(RIG_DEBUG_VERBOSE, "%s called\n", __func__);
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if (rig->state.priv)
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{
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free(rig->state.priv);
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}
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rig->state.priv = NULL;
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return RIG_OK;
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}
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/*
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*/
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int hiqsdr_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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double rxphase;
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uint32_t rxphase32;
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rig_debug(RIG_DEBUG_TRACE, "%s called\n", __func__);
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rxphase = (freq / priv->ref_clock) * (1ULL << 32) + 0.5;
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rxphase32 = (uint32_t)rxphase;
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priv->control_frame[2] = rxphase32 & 0xff;
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priv->control_frame[3] = (rxphase32 >> 8) & 0xff;
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priv->control_frame[4] = (rxphase32 >> 16) & 0xff;
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priv->control_frame[5] = (rxphase32 >> 24) & 0xff;
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if (priv->split == RIG_SPLIT_OFF)
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{
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priv->control_frame[6] = priv->control_frame[2];
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priv->control_frame[7] = priv->control_frame[3];
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priv->control_frame[8] = priv->control_frame[4];
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priv->control_frame[9] = priv->control_frame[5];
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}
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ret = send_command(rig);
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return ret;
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}
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static int hiqsdr_set_split_vfo(RIG *rig, vfo_t vfo, split_t split,
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vfo_t tx_vfo)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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priv->split = split;
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return RIG_OK;
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}
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int hiqsdr_set_split_freq(RIG *rig, vfo_t vfo, freq_t tx_freq)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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double rxphase;
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uint32_t rxphase32;
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rig_debug(RIG_DEBUG_TRACE, "%s called\n", __func__);
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rxphase = (tx_freq / priv->ref_clock) * (1ULL << 32) + 0.5;
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rxphase32 = (uint32_t)rxphase;
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priv->control_frame[6] = rxphase32 & 0xff;
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priv->control_frame[7] = (rxphase32 >> 8) & 0xff;
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priv->control_frame[8] = (rxphase32 >> 16) & 0xff;
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priv->control_frame[9] = (rxphase32 >> 24) & 0xff;
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ret = send_command(rig);
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return ret;
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}
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int hiqsdr_get_freq(RIG *rig, vfo_t vfo, freq_t *freq)
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{
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return -RIG_ENIMPL;
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}
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int hiqsdr_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret = RIG_OK;
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rig_debug(RIG_DEBUG_VERBOSE, "%s called: %s\n",
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__func__, rig_strrmode(mode));
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if (mode == RIG_MODE_CW)
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{
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priv->control_frame[11] = 0x01;
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}
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else
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{
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priv->control_frame[11] = 0x02;
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}
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ret = send_command(rig);
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return ret;
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}
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int hiqsdr_set_ptt(RIG *rig, vfo_t vfo, ptt_t ptt)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret = RIG_OK;
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rig_debug(RIG_DEBUG_VERBOSE, "%s called: %d\n",
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__func__, ptt);
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/* not allowed in CW mode */
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if (priv->control_frame[11] & 0x01)
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{
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return -RIG_ERJCTED;
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}
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if (ptt == RIG_PTT_ON)
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{
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priv->control_frame[11] |= 0x08;
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}
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else
|
|
{
|
|
priv->control_frame[11] &= ~0x08;
|
|
}
|
|
|
|
ret = send_command(rig);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int hiqsdr_set_ant(RIG *rig, vfo_t vfo, ant_t ant, value_t option)
|
|
{
|
|
struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
|
|
int ret = RIG_OK;
|
|
|
|
rig_debug(RIG_DEBUG_VERBOSE, "%s called: %u\n",
|
|
__func__, ant);
|
|
|
|
if (ant == RIG_ANT_2)
|
|
{
|
|
priv->control_frame[16] |= 0x01;
|
|
}
|
|
else
|
|
{
|
|
priv->control_frame[16] &= ~0x01;
|
|
}
|
|
|
|
ret = send_command(rig);
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
int hiqsdr_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val)
|
|
{
|
|
struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
|
|
int ret = RIG_OK;
|
|
|
|
switch (level)
|
|
{
|
|
case RIG_LEVEL_PREAMP:
|
|
if (val.i)
|
|
{
|
|
priv->control_frame[14] |= 0x02;
|
|
}
|
|
else
|
|
{
|
|
priv->control_frame[14] &= ~0x02;
|
|
}
|
|
|
|
break;
|
|
|
|
case RIG_LEVEL_ATT:
|
|
/* FIXME: val->i should be looked up from the att list */
|
|
priv->control_frame[14] = val.i & 0x1f;
|
|
break;
|
|
|
|
case RIG_LEVEL_RFPOWER:
|
|
/* TX output level */
|
|
priv->control_frame[10] = 0xff & (unsigned)(255 * val.f);
|
|
break;
|
|
|
|
default:
|
|
return -RIG_EINVAL;
|
|
}
|
|
|
|
ret = send_command(rig);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hiqsdr_get_level(RIG *rig, vfo_t vfo, setting_t level, value_t *val)
|
|
{
|
|
return -RIG_ENIMPL;
|
|
}
|
|
|