kopia lustrzana https://github.com/Hamlib/Hamlib
411 wiersze
9.3 KiB
C
411 wiersze
9.3 KiB
C
/*
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* Hamlib KIT backend - DDS-60 description
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* Copyright (c) 2007 by Stephane Fillod
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*
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#include <hamlib/config.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include "hamlib/rig.h"
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#include "kit.h"
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#include "parallel.h"
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#include "token.h"
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#define DDS60_MODES (RIG_MODE_AM)
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#define DDS60_FUNC (RIG_FUNC_NONE)
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#define DDS60_LEVEL_ALL (RIG_LEVEL_NONE)
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#define DDS60_PARM_ALL (RIG_PARM_NONE)
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#define DDS60_VFO (RIG_VFO_A)
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/* defaults */
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#define OSCFREQ MHz(30)
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#define IFMIXFREQ kHz(0)
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#define PHASE_INCR 11.25
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struct dds60_priv_data
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{
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freq_t osc_freq;
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freq_t if_mix_freq;
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int multiplier;
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unsigned phase_step; /* as 11.25 deg steps */
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};
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#define TOK_OSCFREQ TOKEN_BACKEND(1)
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#define TOK_IFMIXFREQ TOKEN_BACKEND(2)
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#define TOK_MULTIPLIER TOKEN_BACKEND(3)
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#define TOK_PHASE_MOD TOKEN_BACKEND(4)
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static const struct confparams dds60_cfg_params[] =
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{
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{
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TOK_OSCFREQ, "osc_freq", "Oscillator freq", "Oscillator frequency in Hz",
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"30000000", RIG_CONF_NUMERIC, { .n = { 0, MHz(180), 1 } }
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},
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{
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TOK_IFMIXFREQ, "if_mix_freq", "IF", "IF mixing frequency in Hz",
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"0", RIG_CONF_NUMERIC, { .n = { 0, MHz(180), 1 } }
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},
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{
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TOK_MULTIPLIER, "multiplier", "Multiplier", "Optional X6 multiplier",
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"1", RIG_CONF_CHECKBUTTON
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},
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{
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TOK_IFMIXFREQ, "phase_mod", "Phase Modulation", "Phase modulation in degrees",
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"0", RIG_CONF_NUMERIC, { .n = { 0, 360, PHASE_INCR } }
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},
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{ RIG_CONF_END, NULL, }
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};
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static int dds60_init(RIG *rig);
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static int dds60_cleanup(RIG *rig);
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static int dds60_open(RIG *rig);
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static int dds60_set_freq(RIG *rig, vfo_t vfo, freq_t freq);
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static int dds60_set_conf(RIG *rig, token_t token, const char *val);
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static int dds60_get_conf(RIG *rig, token_t token, char *val);
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/*
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* The DDS-60 kit exists with a AD9851 chip (60 MHz),
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* as well as with the AD9850 chip (30 MHz) (no multiplier).
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* There is an option to enable/disable the AD9851 X6 multiplier.
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* http://www.amqrp.org/kits/dds60/
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* http://www.analog.com/en/prod/0,2877,AD9851,00.html
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*
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* The receiver is controlled via the parallel port (D0,D1,D2).
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*/
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const struct rig_caps dds60_caps =
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{
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RIG_MODEL(RIG_MODEL_DDS60),
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.model_name = "DDS-60",
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.mfg_name = "AmQRP",
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.version = "20200112.0",
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.copyright = "LGPL",
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.status = RIG_STATUS_BETA,
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.rig_type = RIG_TYPE_TUNER,
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.ptt_type = RIG_PTT_NONE,
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.dcd_type = RIG_DCD_NONE,
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.port_type = RIG_PORT_PARALLEL,
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.write_delay = 0,
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.post_write_delay = 0,
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.timeout = 200,
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.retry = 0,
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.has_get_func = DDS60_FUNC,
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.has_set_func = DDS60_FUNC,
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.has_get_level = DDS60_LEVEL_ALL,
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.has_set_level = RIG_LEVEL_SET(DDS60_LEVEL_ALL),
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.has_get_parm = DDS60_PARM_ALL,
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.has_set_parm = RIG_PARM_SET(DDS60_PARM_ALL),
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.level_gran = {},
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.parm_gran = {},
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.ctcss_list = NULL,
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.dcs_list = NULL,
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.preamp = { RIG_DBLST_END },
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.attenuator = { RIG_DBLST_END },
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.max_rit = Hz(0),
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.max_xit = Hz(0),
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.max_ifshift = Hz(0),
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.targetable_vfo = 0,
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.transceive = RIG_TRN_OFF,
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.bank_qty = 0,
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.chan_desc_sz = 0,
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.chan_list = { RIG_CHAN_END },
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.rx_range_list1 = {
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{MHz(1), MHz(60), DDS60_MODES, -1, -1, DDS60_VFO}, /* TBC */
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RIG_FRNG_END,
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},
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.tx_range_list1 = { RIG_FRNG_END, },
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.rx_range_list2 = {
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{MHz(1), MHz(60), DDS60_MODES, -1, -1, DDS60_VFO},
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RIG_FRNG_END,
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},
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.tx_range_list2 = { RIG_FRNG_END, },
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.tuning_steps = {
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{DDS60_MODES, 1},
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RIG_TS_END,
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},
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/* mode/filter list, remember: order matters! */
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.filters = {
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{DDS60_MODES, kHz(12)},
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RIG_FLT_END,
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},
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.cfgparams = dds60_cfg_params,
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.rig_init = dds60_init,
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.rig_cleanup = dds60_cleanup,
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.rig_open = dds60_open,
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.set_conf = dds60_set_conf,
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.get_conf = dds60_get_conf,
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.set_freq = dds60_set_freq,
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.hamlib_check_rig_caps = HAMLIB_CHECK_RIG_CAPS
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};
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int dds60_init(RIG *rig)
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{
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struct dds60_priv_data *priv;
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rig->state.priv = (struct dds60_priv_data *)malloc(sizeof(
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struct dds60_priv_data));
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if (!rig->state.priv)
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{
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/* whoops! memory shortage! */
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return -RIG_ENOMEM;
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}
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priv = rig->state.priv;
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priv->osc_freq = OSCFREQ;
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priv->if_mix_freq = IFMIXFREQ;
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priv->multiplier = 1;
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priv->phase_step = 0;
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return RIG_OK;
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}
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int dds60_cleanup(RIG *rig)
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{
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if (!rig)
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{
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return -RIG_EINVAL;
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}
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if (rig->state.priv)
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{
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free(rig->state.priv);
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}
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rig->state.priv = NULL;
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return RIG_OK;
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}
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/*
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* Assumes rig!=NULL, rig->state.priv!=NULL
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*/
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int dds60_set_conf(RIG *rig, token_t token, const char *val)
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{
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struct dds60_priv_data *priv;
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float phase;
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priv = (struct dds60_priv_data *)rig->state.priv;
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switch (token)
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{
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case TOK_OSCFREQ:
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sscanf(val, "%"SCNfreq, &priv->osc_freq);
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break;
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case TOK_IFMIXFREQ:
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sscanf(val, "%"SCNfreq, &priv->if_mix_freq);
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break;
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case TOK_MULTIPLIER:
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sscanf(val, "%d", &priv->multiplier);
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break;
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case TOK_PHASE_MOD:
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sscanf(val, "%f", &phase);
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priv->phase_step = ((unsigned)((phase + PHASE_INCR / 2) / PHASE_INCR)) % 32;
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break;
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default:
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return -RIG_EINVAL;
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}
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return RIG_OK;
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}
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/*
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* assumes rig!=NULL,
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* Assumes rig!=NULL, rig->state.priv!=NULL
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* and val points to a buffer big enough to hold the conf value.
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*/
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int dds60_get_conf2(RIG *rig, token_t token, char *val, int val_len)
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{
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struct dds60_priv_data *priv;
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priv = (struct dds60_priv_data *)rig->state.priv;
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switch (token)
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{
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case TOK_OSCFREQ:
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SNPRINTF(val, val_len, "%"PRIfreq, priv->osc_freq);
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break;
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case TOK_IFMIXFREQ:
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SNPRINTF(val, val_len, "%"PRIfreq, priv->if_mix_freq);
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break;
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case TOK_MULTIPLIER:
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SNPRINTF(val, val_len, "%d", priv->multiplier);
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break;
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case TOK_PHASE_MOD:
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SNPRINTF(val, val_len, "%f", priv->phase_step * PHASE_INCR);
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break;
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default:
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return -RIG_EINVAL;
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}
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return RIG_OK;
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}
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int dds60_get_conf(RIG *rig, token_t token, char *val)
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{
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return dds60_get_conf2(rig, token, val, 128);
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}
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#define DATA 0x01 /* d0 */
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#define CLOCK 0x02 /* d1 */
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#define LOAD 0x03 /* d2 */
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static void ad_delay(int delay)
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{
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/* none needed, I/O bus should be slow enough */
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}
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static void ad_bit(hamlib_port_t *port, unsigned char bit)
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{
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bit &= DATA;
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par_write_data(port, bit);
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ad_delay(1);
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par_write_data(port, bit | CLOCK);
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ad_delay(1);
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par_write_data(port, bit);
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ad_delay(1);
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}
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static void ad_write(hamlib_port_t *port, unsigned long word,
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unsigned char control)
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{
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int i;
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/* lock the parallel port */
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par_lock(port);
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/* shift out the least significant 32 bits of the word */
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for (i = 0; i < 32; i++)
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{
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ad_bit(port, word & DATA);
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word >>= 1;
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}
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/* write out the control byte */
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for (i = 0; i < 8; i++)
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{
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ad_bit(port, control & DATA);
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control >>= 1;
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}
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/* load the register */
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par_write_data(port, LOAD);
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ad_delay(1);
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par_write_data(port, 0);
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/* unlock the parallel port */
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par_unlock(port);
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}
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int dds60_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
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{
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unsigned long frg;
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unsigned char control;
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struct dds60_priv_data *priv;
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hamlib_port_t *port = &rig->state.rigport;
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freq_t osc_ref;
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priv = (struct dds60_priv_data *)rig->state.priv;
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if (priv->multiplier)
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{
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osc_ref = priv->osc_freq * 6;
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}
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else
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{
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osc_ref = priv->osc_freq;
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}
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/* all frequencies are in Hz */
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frg = (unsigned long)(((double)freq + priv->if_mix_freq) /
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osc_ref * 4294967296.0 + 0.5);
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rig_debug(RIG_DEBUG_VERBOSE, "%s: word %lu, X6 multiplier %d, phase %.2f\n",
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__func__, frg, priv->multiplier, priv->phase_step * PHASE_INCR);
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control = priv->multiplier ? 0x01 : 0x00;
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control |= (priv->phase_step & 0x1f) << 3;
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ad_write(port, frg, control);
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return RIG_OK;
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}
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int dds60_open(RIG *rig)
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{
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hamlib_port_t *port = &rig->state.rigport;
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/* lock the parallel port */
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par_lock(port);
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/* Serial load enable sequence W_CLK */
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par_write_data(port, 0);
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ad_delay(1);
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par_write_data(port, CLOCK);
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ad_delay(1);
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par_write_data(port, 0);
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ad_delay(1);
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/* Serial load enable sequence FQ_UD */
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par_write_data(port, LOAD);
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ad_delay(1);
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par_write_data(port, 0);
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/* unlock the parallel port */
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par_unlock(port);
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return RIG_OK;
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}
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