kopia lustrzana https://github.com/F5OEO/rpitx
108 wiersze
2.9 KiB
C
108 wiersze
2.9 KiB
C
#ifndef RPI_GPIO
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#define RPI_GPIO
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <string.h>
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#include <errno.h>
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#include <stdarg.h>
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#include <stdint.h>
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#include <ctype.h>
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char InitGpio(void);
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void DisplayInfo();
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int model;
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uint32_t mem_flag;
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volatile uint32_t *pwm_reg;
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volatile uint32_t *clk_reg;
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volatile uint32_t *dma_reg;
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volatile uint32_t *gpio_reg;
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volatile uint32_t *pcm_reg;
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volatile uint32_t *pad_gpios_reg;
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void * map_peripheral(uint32_t base, uint32_t len);
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int gpioSetMode(unsigned gpio, unsigned mode);
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#define DMA_BASE (BCM2708_PERI_BASE + 0x00007000 )
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#define DMA_LEN 0xF00
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#define PWM_BASE (BCM2708_PERI_BASE + 0x0020C000)
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#define PWM_LEN 0x28
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#define CLK_BASE (BCM2708_PERI_BASE + 0x00101000)
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#define CLK_LEN 0xA8
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#define GPIO_BASE (BCM2708_PERI_BASE + 0x00200000)
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#define GPIO_LEN 0xB4
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#define PCM_BASE (BCM2708_PERI_BASE + 0x00203000)
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#define PCM_LEN 0x24
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#define PADS_GPIO (BCM2708_PERI_BASE + 0x00100000)
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#define PADS_GPIO_LEN (0x40/4)
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#define PADS_GPIO_0 (0x2C/4)
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#define PADS_GPIO_1 (0x30/4)
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#define PADS_GPIO_2 (0x34/4)
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#define PWM_CTL (0x00/4)
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#define PWM_DMAC (0x08/4)
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#define PWM_RNG1 (0x10/4)
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#define PWM_RNG2 (0x20/4)
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#define PWM_FIFO (0x18/4)
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#define PWMCLK_CNTL 40
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#define PWMCLK_DIV 41
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#define GPCLK_CNTL (0x70/4)
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#define GPCLK_DIV (0x74/4)
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#define PWMCTL_MSEN2 (1<<15)
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#define PWMCTL_USEF2 (1<<13)
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#define PWMCTL_RPTL2 (1<<10)
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#define PWMCTL_MODE2 (1<<9)
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#define PWMCTL_PWEN2 (1<<8)
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#define PWMCTL_MSEN1 (1<<7)
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#define PWMCTL_CLRF (1<<6)
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#define PWMCTL_USEF1 (1<<5)
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#define PWMCTL_POLA1 (1<<4)
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#define PWMCTL_RPTL1 (1<<2)
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#define PWMCTL_MODE1 (1<<1)
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#define PWMCTL_PWEN1 (1<<0)
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#define PWMDMAC_ENAB (1<<31)
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#define PWMDMAC_THRSHLD ((15<<8)|(15<<0))
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#define PCM_CS_A (0x00/4)
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#define PCM_FIFO_A (0x04/4)
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#define PCM_MODE_A (0x08/4)
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#define PCM_RXC_A (0x0c/4)
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#define PCM_TXC_A (0x10/4)
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#define PCM_DREQ_A (0x14/4)
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#define PCM_INTEN_A (0x18/4)
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#define PCM_INT_STC_A (0x1c/4)
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#define PCM_GRAY (0x20/4)
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#define PCMCLK_CNTL 38
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#define PCMCLK_DIV 39
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#define GPFSEL0 (0x00/4)
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#define GPFSEL1 (0x04/4)
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#define GPFSEL2 (0x08/4)
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// ---- Memory allocating defines
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// https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
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#define MEM_FLAG_DISCARDABLE (1 << 0) /* can be resized to 0 at any time. Use for cached data */
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#define MEM_FLAG_NORMAL (0 << 2) /* normal allocating alias. Don't use from ARM */
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#define MEM_FLAG_DIRECT (1 << 2) /* 0xC alias uncached */
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#define MEM_FLAG_COHERENT (2 << 2) /* 0x8 alias. Non-allocating in L2 but coherent */
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#define MEM_FLAG_L1_NONALLOCATING (MEM_FLAG_DIRECT | MEM_FLAG_COHERENT) /* Allocating in L2 */
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#define MEM_FLAG_ZERO ( 1 << 4) /* initialise buffer to all zeros */
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#define MEM_FLAG_NO_INIT ( 1 << 5) /* don't initialise (default is initialise to all ones */
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#define MEM_FLAG_HINT_PERMALOCK (1 << 6) /* Likely to be locked for long periods of time. */
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#endif
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