kopia lustrzana https://github.com/F5OEO/WsprryPi
Added lots of comments. Moved mmap out of main loop. Working.
James Peroulas
rodzic
07f19700ed
commit
6de039b511
282
wspr.cpp
282
wspr.cpp
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@ -204,15 +204,16 @@ struct DMAregs {
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};
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struct PageInfo {
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void* p; // physical address
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void* v; // virtual address
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void* b; // bus address
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void* v; // virtual address
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};
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// Must be global so that exit handlers can access this.
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static struct {
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int handle; /* From mbox_open() */
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unsigned mem_ref; /* From mem_alloc() */
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unsigned bus_addr; /* From mem_lock() */
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unsigned char *virt_addr; /* From mapmem() */ //ha7ilm: originally uint8_t
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int handle; /* From mbox_open() */
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unsigned mem_ref = 0; /* From mem_alloc() */
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unsigned bus_addr; /* From mem_lock() */
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unsigned char *virt_addr = NULL; /* From mapmem() */ //ha7ilm: originally uint8_t
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unsigned pool_size;
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unsigned pool_cnt;
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} mbox;
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@ -227,7 +228,9 @@ void allocMemPool(unsigned numpages)
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//printf("allocMemoryPool bus_addr=%x virt_addr=%x mem_ref=%x\n",mbox.bus_addr,(unsigned)mbox.virt_addr,mbox.mem_ref);
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}
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void getRealMemPageFromPool(void ** vAddr, void **pAddr)
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// Returns the virtual and bus address (NOT physical address!) of another
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// page in the pool.
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void getRealMemPageFromPool(void ** vAddr, void **bAddr)
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{
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if (mbox.pool_cnt>=mbox.pool_size) {
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std::cerr << "Error: unable to allocated more pages!" << std::endl;
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@ -235,45 +238,81 @@ void getRealMemPageFromPool(void ** vAddr, void **pAddr)
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}
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unsigned offset = mbox.pool_cnt*4096;
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*vAddr = (void*)(((unsigned)mbox.virt_addr) + offset);
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*pAddr = (void*)(((unsigned)mbox.bus_addr) + offset);
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*bAddr = (void*)(((unsigned)mbox.bus_addr) + offset);
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//printf("getRealMemoryPageFromPool bus_addr=%x virt_addr=%x\n", (unsigned)*pAddr,(unsigned)*vAddr);
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mbox.pool_cnt++;
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}
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void deallocMemPool()
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{
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if(mbox.virt_addr) //it will be 0 by default as in .bss
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{
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if(mbox.virt_addr!=NULL) {
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unmapmem(mbox.virt_addr, mbox.pool_size*4096);
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}
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if (mbox.mem_ref!=0) {
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mem_unlock(mbox.handle, mbox.mem_ref);
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mem_free(mbox.handle, mbox.mem_ref);
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}
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}
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void disable_clock() {
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// Disable the clock (in case it's already running) by reading current
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// settings and only clearing the enable bit.
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auto settings=ACCESS_BUS_ADDR(CM_GP0CTL_BUS);
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// Clear enable bit and add password
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settings=(settings&0x7EF)|0x5A000000;
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// Disable
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ACCESS_BUS_ADDR(CM_GP0CTL_BUS) = *((int*)&settings);
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// Wait for clock to not be busy.
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while (true) {
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if (!(ACCESS_BUS_ADDR(CM_GP0CTL_BUS)&(1<<7))) {
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break;
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}
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}
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}
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void txon()
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{
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SETBIT_BUS_ADDR(GPIO_BUS_BASE , 14);
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CLRBIT_BUS_ADDR(GPIO_BUS_BASE , 13);
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CLRBIT_BUS_ADDR(GPIO_BUS_BASE , 12);
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// Set function select for GPIO4.
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// Fsel 000 => input
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// Fsel 001 => output
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// Fsel 100 => alternate function 0
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// Fsel 101 => alternate function 1
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// Fsel 110 => alternate function 2
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// Fsel 111 => alternate function 3
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// Fsel 011 => alternate function 4
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// Fsel 010 => alternate function 5
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// Function select for GPIO is configured as 'b100 which selects
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// alternate function 0 for GPIO4. Alternate function 0 is GPCLK0.
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// See section 6.2 of Arm Peripherals Manual.
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SETBIT_BUS_ADDR(GPIO_BUS_BASE , 14);
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CLRBIT_BUS_ADDR(GPIO_BUS_BASE , 13);
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CLRBIT_BUS_ADDR(GPIO_BUS_BASE , 12);
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// Set GPIO drive strength, more info: http://www.scribd.com/doc/101830961/GPIO-Pads-Control2
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 0; //2mA -3.4dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 1; //4mA +2.1dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 2; //6mA +4.9dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 3; //8mA +6.6dBm(default)
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 4; //10mA +8.2dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 5; //12mA +9.2dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 6; //14mA +10.0dBm
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ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 7; //16mA +10.6dBm
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// Set GPIO drive strength, more info: http://www.scribd.com/doc/101830961/GPIO-Pads-Control2
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 0; //2mA -3.4dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 1; //4mA +2.1dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 2; //6mA +4.9dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 3; //8mA +6.6dBm(default)
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 4; //10mA +8.2dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 5; //12mA +9.2dBm
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//ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 6; //14mA +10.0dBm
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ACCESS_BUS_ADDR(PADS_GPIO_0_27_BUS) = 0x5a000018 + 7; //16mA +10.6dBm
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struct GPCTL setupword = {6/*SRC*/, 1, 0, 0, 0, 3,0x5a};
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ACCESS_BUS_ADDR(CM_GP0CTL_BUS) = *((int*)&setupword);
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disable_clock();
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// Set clock source as PLLD.
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struct GPCTL setupword = {6/*SRC*/, 0, 0, 0, 0, 3,0x5a};
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// Enable clock.
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setupword = {6/*SRC*/, 1, 0, 0, 0, 3,0x5a};
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ACCESS_BUS_ADDR(CM_GP0CTL_BUS) = *((int*)&setupword);
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}
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void txoff()
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{
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struct GPCTL setupword = {6/*SRC*/, 0, 0, 0, 0, 1,0x5a};
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ACCESS_BUS_ADDR(CM_GP0CTL_BUS) = *((int*)&setupword);
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//struct GPCTL setupword = {6/*SRC*/, 0, 0, 0, 0, 1,0x5a};
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//ACCESS_BUS_ADDR(CM_GP0CTL_BUS) = *((int*)&setupword);
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disable_clock();
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}
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// Transmit symbol sym for tsym seconds.
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@ -327,29 +366,29 @@ void txSym(
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// Configure the transmission for this iteration
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// Set GPIO pin to transmit f0
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bufPtr++;
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].p)) usleep(100);
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((struct CB*)(instrs[bufPtr].v))->SOURCE_AD = (long int)constPage.p + f0_idx*4;
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].b)) usleep(100);
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((struct CB*)(instrs[bufPtr].v))->SOURCE_AD = (long int)constPage.b + f0_idx*4;
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// Wait for n_f0 PWM clocks
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bufPtr++;
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].p)) usleep(100);
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].b)) usleep(100);
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((struct CB*)(instrs[bufPtr].v))->TXFR_LEN = n_f0;
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// Set GPIO pin to transmit f1
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bufPtr++;
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].p)) usleep(100);
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((struct CB*)(instrs[bufPtr].v))->SOURCE_AD = (long int)constPage.p + f1_idx*4;
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].b)) usleep(100);
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((struct CB*)(instrs[bufPtr].v))->SOURCE_AD = (long int)constPage.b + f1_idx*4;
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// Wait for n_f1 PWM clocks
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bufPtr=(bufPtr+1) % (1024);
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].p)) usleep(100);
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while( ACCESS_BUS_ADDR(DMA_BUS_BASE + 0x04 /* CurBlock*/) == (long int)(instrs[bufPtr].b)) usleep(100);
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((struct CB*)(instrs[bufPtr].v))->TXFR_LEN = n_f1;
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// Update counters
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n_pwmclk_transmitted+=n_pwmclk;
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n_f0_transmitted+=n_f0;
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}
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//printf("<instrs[bufPtr]=%x %x>",(unsigned)instrs[bufPtr].v,(unsigned)instrs[bufPtr].p);
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//printf("<instrs[bufPtr]=%x %x>",(unsigned)instrs[bufPtr].v,(unsigned)instrs[bufPtr].b);
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}
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void unSetupDMA(){
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@ -427,17 +466,10 @@ void setupDMA(
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struct PageInfo & instrPage,
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struct PageInfo instrs[]
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){
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atexit(unSetupDMA);
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atexit(deallocMemPool);
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signal (SIGINT, handSig);
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signal (SIGTERM, handSig);
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signal (SIGHUP, handSig);
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signal (SIGQUIT, handSig);
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allocMemPool(1025);
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// Allocate a page of ram for the constants
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getRealMemPageFromPool(&constPage.v, &constPage.p);
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getRealMemPageFromPool(&constPage.v, &constPage.b);
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// Create 1024 instructions allocating one page at a time.
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// Even instructions target the GP0 Clock divider
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@ -445,7 +477,7 @@ void setupDMA(
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int instrCnt = 0;
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while (instrCnt<1024) {
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// Allocate a page of ram for the instructions
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getRealMemPageFromPool(&instrPage.v, &instrPage.p);
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getRealMemPageFromPool(&instrPage.v, &instrPage.b);
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// make copy instructions
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// Only create as many instructions as will fit in the recently
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@ -455,12 +487,12 @@ void setupDMA(
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int i;
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for (i=0; i<(signed)(4096/sizeof(struct CB)); i++) {
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instrs[instrCnt].v = (void*)((long int)instrPage.v + sizeof(struct CB)*i);
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instrs[instrCnt].p = (void*)((long int)instrPage.p + sizeof(struct CB)*i);
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instr0->SOURCE_AD = (unsigned long int)constPage.p+2048;
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instrs[instrCnt].b = (void*)((long int)instrPage.b + sizeof(struct CB)*i);
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instr0->SOURCE_AD = (unsigned long int)constPage.b+2048;
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instr0->DEST_AD = PWM_BUS_BASE+0x18 /* FIF1 */;
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instr0->TXFR_LEN = 4;
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instr0->STRIDE = 0;
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//instr0->NEXTCONBK = (int)instrPage.p + sizeof(struct CB)*(i+1);
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//instr0->NEXTCONBK = (int)instrPage.b + sizeof(struct CB)*(i+1);
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instr0->TI = (1/* DREQ */<<6) | (5 /* PWM */<<16) | (1<<26/* no wide*/) ;
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instr0->RES1 = 0;
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instr0->RES2 = 0;
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@ -472,13 +504,13 @@ void setupDMA(
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instr0->TI = (1<<26/* no wide*/) ;
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}
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if (instrCnt!=0) ((struct CB*)(instrs[instrCnt-1].v))->NEXTCONBK = (long int)instrs[instrCnt].p;
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if (instrCnt!=0) ((struct CB*)(instrs[instrCnt-1].v))->NEXTCONBK = (long int)instrs[instrCnt].b;
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instr0++;
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instrCnt++;
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}
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}
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// Create a circular linked list of instructions
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((struct CB*)(instrs[1023].v))->NEXTCONBK = (long int)instrs[0].p;
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((struct CB*)(instrs[1023].v))->NEXTCONBK = (long int)instrs[0].b;
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// set up a clock for the PWM
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ACCESS_BUS_ADDR(CLK_BUS_BASE + 40*4 /*PWMCLK_CNTL*/) = 0x5A000026; // Source=PLLD and disable
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@ -505,83 +537,11 @@ void setupDMA(
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DMA0->CS =1<<31; // reset
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DMA0->CONBLK_AD=0;
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DMA0->TI=0;
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DMA0->CONBLK_AD = (unsigned long int)(instrPage.p);
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DMA0->CONBLK_AD = (unsigned long int)(instrPage.b);
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DMA0->CS =(1<<0)|(255 <<16); // enable bit = 0, clear end flag = 1, prio=19-16
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}
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//
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// Set up memory regions to access GPIO
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//
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void setup_io(
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int & mem_fd
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//char * & gpio_mem,
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//char * & gpio_map,
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//volatile unsigned * & gpio
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) {
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/* open /dev/mem */
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if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
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std::cerr << "Error: can't open /dev/mem" << std::endl;
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ABORT (-1);
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}
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/* mmap GPIO */
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// Allocate MAP block
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//if ((gpio_mem = (char *)malloc(BLOCK_SIZE + (PAGE_SIZE-1))) == NULL) {
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// std::cerr << "Error: allocation error" << std::endl;
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// ABORT (-1);
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//}
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// Make sure pointer is on 4K boundary
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//if ((unsigned long)gpio_mem % PAGE_SIZE)
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// gpio_mem += PAGE_SIZE - ((unsigned long)gpio_mem % PAGE_SIZE);
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// Now map it
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//gpio_map = (char *)mmap(
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// gpio_mem,
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// BLOCK_SIZE,
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// PROT_READ|PROT_WRITE,
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// MAP_SHARED|MAP_FIXED,
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// mem_fd,
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// GPIO_VIRT_BASE
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// );
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//if ((long)gpio_map < 0) {
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// std::cerr << "Error: mmap error" << (long int)gpio_map << std::endl;
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// ABORT (-1);
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//}
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// Always use volatile pointer!
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//gpio = (volatile unsigned *)gpio_map;
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}
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// Not sure why this function is needed as this code only uses GPIO4 and
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// this function sets gpio 7 through 11 as input...
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#if 0
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void setup_gpios(
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volatile unsigned * & gpio
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){
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int g;
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// Switch GPIO 7..11 to output mode
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/************************************************************************\
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* You are about to change the GPIO settings of your computer. *
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* Mess this up and it will stop working! *
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* It might be a good idea to 'sync' before running this program *
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* so at least you still have your code changes written to the SD-card! *
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\************************************************************************/
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// Set GPIO pins 7-11 to output
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for (g=7; g<=11; g++) {
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//INP_GPIO(g); // must use INP_GPIO before we can use OUT_GPIO
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//OUT_GPIO(g);
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}
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}
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#endif
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// Convert std::string to uppercase
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// Convert string to uppercase
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void to_upper(char *str)
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{ while(*str)
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{
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@ -1061,20 +1021,72 @@ void open_mbox() {
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}
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}
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void unlinkmbox() {
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void cleanup() {
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disable_clock();
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unSetupDMA();
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deallocMemPool();
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unlink(DEVICE_FILE_NAME);
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unlink(LOCAL_DEVICE_FILE_NAME);
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};
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}
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void cleanupAndExit(int sig) {
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cleanup();
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printf("Exiting with error; caught signal: %i\n", sig);
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exit(1);
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}
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void setSchedPriority(int priority) {
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//In order to get the best timing at a decent queue size, we want the kernel to avoid interrupting us for long durations.
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//This is done by giving our process a high priority. Note, must run as super-user for this to work.
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struct sched_param sp;
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sp.sched_priority=priority;
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int ret = pthread_setschedparam(pthread_self(), SCHED_FIFO, &sp);
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if (ret) {
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printf("Warning: pthread_setschedparam (increase thread priority) returned non-zero: %i\n", ret);
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}
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}
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void setup_peri_base_virt(
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volatile unsigned * & peri_base_virt
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) {
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int mem_fd;
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// open /dev/mem
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if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
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std::cerr << "Error: can't open /dev/mem" << std::endl;
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ABORT (-1);
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}
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peri_base_virt = (unsigned *)mmap(
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NULL,
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0x002FFFFF, //len
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PROT_READ|PROT_WRITE,
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MAP_SHARED,
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mem_fd,
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PERI_BASE_PHYS //base
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);
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if ((long int)peri_base_virt==-1) {
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std::cerr << "Error: mmap error!" << std::endl;
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ABORT(-1);
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}
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close(mem_fd);
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}
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int main(const int argc, char * const argv[]) {
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//catch all signals (like ctrl+c, ctrl+z, ...) to ensure DMA is disabled
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for (int i = 0; i < 64; i++) {
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struct sigaction sa;
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memset(&sa, 0, sizeof(sa));
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sa.sa_handler = cleanupAndExit;
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sigaction(i, &sa, NULL);
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}
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atexit(cleanup);
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setSchedPriority(30);
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#ifdef RPI1
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std::cout << "Detected Raspberry Pi version 1" << std::endl;
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#else
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std::cout << "Detected Raspberry Pi version 2/3" << std::endl;
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#endif
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atexit(unlinkmbox);
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|
||||
// Initialize the RNG
|
||||
srand(time(NULL));
|
||||
|
||||
|
|
@ -1110,24 +1122,8 @@ int main(const int argc, char * const argv[]) {
|
|||
int nbands=center_freq_set.size();
|
||||
|
||||
// Initial configuration
|
||||
int mem_fd;
|
||||
//char *gpio_mem, *gpio_map;
|
||||
//volatile unsigned *gpio = NULL;
|
||||
//setup_io(mem_fd,gpio_mem,gpio_map,gpio);
|
||||
setup_io(mem_fd);
|
||||
//setup_gpios(gpio);
|
||||
peri_base_virt = (unsigned *)mmap(
|
||||
NULL,
|
||||
0x002FFFFF, //len
|
||||
PROT_READ|PROT_WRITE,
|
||||
MAP_SHARED,
|
||||
mem_fd,
|
||||
PERI_BASE_PHYS //base
|
||||
);
|
||||
if ((long int)peri_base_virt==-1) {
|
||||
std::cerr << "Error: mmap error!" << std::endl;
|
||||
ABORT(-1);
|
||||
}
|
||||
setup_peri_base_virt(peri_base_virt);
|
||||
// Set up DMA
|
||||
open_mbox();
|
||||
txon();
|
||||
struct PageInfo constPage;
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue